This change will fetch "qti,scm_restart_reason" node
from soc node, if it is not available under root node.
Change-Id: I2328dee16d0133be54abd9f565a1a34afb8241b6
Signed-off-by: Kavin A <quic_kavia@quicinc.com>
Certain boards come in different variations by way of utilizing daughter
boards, for example. These boards might contain additional chips, which
are added to the main board's busses, e.g. I2C.
The device tree support for such boards would either, quite naturally,
employ the overlay mechanism to add such chips to the tree, or would use
one large default device tree, and delete the devices that are actually
not present.
Regardless of approach, even on the U-Boot level, a modification of the
device tree is a prerequisite to have such modular families of boards
supported properly.
Therefore, we add an option to make the U-Boot device tree (the actual
copy later used by the driver model) writeable, and add a callback
method that allows boards to modify the device tree at an early stage,
at which, hopefully, also the application of device tree overlays will
be possible.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
(cherry picked from commit 2a792753d6)
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
Change-Id: I9a5fe4c6d681aaa5c68edd8a2a39d36bf2340fdf
After secure sysupgrade, uboot/TZ successfully authenticates
rootfs even if the signature & certificates are not appended
to kernel image. This is because the header and certificates
copied to DDR memory before sysupgrade is retained. Updated
the code to clear this DDR memory after authentication.
Change-Id: Ic2331326baefc945c217a507d4379951dba821ab
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This change support both legacy and current node
configuration.
Change-Id: I2a930950472119210961238d39dd00f9482cbe6e
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Add failsafe boot support to recover from system hang.
Signed-off-by: anusha <anusharao@codeaurora.org>
Change-Id: I49e28a4e88aa16e564065d06f8701dc4f6cb3555
This change will add support for Macronix "MX35UF2GE4AD-Z4I" spi nand
Change-Id: I5d783473c0ec918b02e59a85b71ee941fe649365
Signed-off-by: Kavin A <quic_kavia@quicinc.com>
Currently, during secure authentication only return values are checked,
error codes are not considered. So, added respective check to verify both
return value and error codes value during secure_authentication scm call.
Change-Id: Ie3e4fbf8651666001bdfacc0705fb2799a306b96
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This patch optimizes and updates the EDMA Driver as
required for ipq9574 platform similar to the Kernel
Host EDMA Driver.
-> Config TX_MOD and RX_MOD timers
-> Config DMAR_CTRL
-> Config Service code bypass for TX_DESC
-> Update the SRCINFO and DST_PORT configs
-> Make changes to include secondary and primary DESC's
into the same corresponding ring structure
-> Increase the TX_BUFF Size to 2048
-> Update to use RX_DESC RING 23
-> Remove unused fields from the EDMA structures
-> Update the description for the EDMA structure fields
Change-Id: I3f7f1c11cdd87687c38774a4930c9bee90857203
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
Enabling the RE bit causes some issue in Kernel
when rcgr is configured.
Currently the RE bit is not set for these clocks
in Kernel as well and so reverting the same.
Change-Id: I12e29863531b64637d906026cab4374b49268cd0
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch updates the following:
1) Updates NSS NOC clock frequencies to expected clock rates
2) Add Debug prints during eth_halt which can help debug issues
3) Update ACL structure and configurations for ipq9574 platform
as required
4) Disable the MIB counters reset bit so that those counter
registers values can be dumped to check stats
5) Update VSI configurations for cases when BRIDGED_MODE config
is disabled
6) Update the VSI configuration to avoid flooding from one LAN
port to another
Change-Id: I39f20a57c08205fbeb669c93b6459cf8e184098d
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
On Linux-5.4 dts, SDX status GPIO pinmux node has
changed. Add new patch instruction for the same.
Change-Id: I0235f2a2ee335c7f916644c87f5cd7ed16174554
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com>
The command dpr_execute <load_address_of_dpr_binary>
is defined for the user to initiate DPR processing.
Uboot will raise scm call to TZ and pass the DPR load address.
Change-Id: Ide4495b49485a4ac6b722f0cb7d423d6a93946ca
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
IPQ5018 uses option qcn6122 to enable wifi fw selection.
This patch adds a new generic name 'multi_wifi_fw' to do
the same.
Change-Id: I6ca01e5c16537ea6d9f5e53f956d7e68566dc5ae
Signed-off-by: Rajkumar Ayyasamy <quic_arajkuma@quicinc.com>
Added read & write bam pipe entires in all the ipq specific dtsi.
Also, updated the spi bam code with generic code changes to enable
the multiple spi support on all ipq chipsets.
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Signed-off-by: Ram Kumar D <ramd@codeaurora.org>
Change-Id: Ibcdb9d2a9ff7a25f3d296ecdb1aca403511e07d7
The main differece on AL02-C4 are,
PCIE1: 2G WKK
PCIE2: 6G WKK
PCIE3: 5G WKK
Other features are same as AL02-C1.
Change-Id: Ie13154dacf247c99e15f1da775238012075740ee
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
The MMC mode switch command gets timed out occassionally.
Due to this, set_uuid_bootargs fails and uboot doesn't
jump to kernel. This issue is seen only in norplusemmc boot.
In eMMC Boot, board_mmc_env_init is called which handles
timeout case. Added the same logic to set_uuid_bootargs.
Change-Id: Ie9eb91b00f28c23c136d88e3cb39572e59c759e7
Signed-off-by: anusha <anusharao@codeaurora.org>
In IPQ9574, TZ adds base addr + 300K(TMEL ctxt size) and stores this addr in imem.
Updated TLV_BUF_OFFSET to subtract TMEL offset from base addr.
Change-Id: I54ea5be4133f2c0435ecaabff392b20c67ec5d48
Signed-off-by: Kavin A <kavia@codeaurora.org>
