The RTL8218D currently relies on proper U-Boot configuration. In
case that is not possible, provide a basic setup sequence that can
bring the PHY "alive". The SDK provides multiple configuration
sequences for two operation modes (XSGMII or QSGMII) and the different
SoC families. Due to limited testing resources only provide a setup
for RTL93xx devices and both modes at the moment.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21551
Signed-off-by: Robert Marko <robimarko@gmail.com>
The dts for RTL93xx devices has duplicate data about the
smi bus of a phy node. The parent node declares the number
of the bus and the realtek,smi-address attribute does the
same.
Remove the bus part from the realtek,smi-address attribute
and lookup the bus from the parent node. While we are here
remove all realtek,smi-address attributes where phy id
matches the bus address. The driver will use that as a
fallback.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Switch the mdio bus topology for devices that have their phys
attached to bus 1-3. This does not have any impact because
the mdio driver was completly redisgned
With this commit the bus id is stored twice. Once in the (new)
bus and in the (old) realtek,smi-address property. E.g.
&mdio_bus1 {
reg = <1>; <<< bus id
phy24: ethernet-phy@24 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 2>; <<< bus & address id
};
};
This redundancy will be removed later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL93xx devices have 4 smi busses (0-3). Add them to the dts.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mdio driver currently determines the smi bus and address from the
realtek,smi-address attribute of the phy. To better reflect the
topology and align with upstream, the phys should be relocated below
their associated bus. As an interim solution the following dts notation
is in focus.
mdio_ctrl: mdio-controller {
mdio_bus0: mdio-bus@0 {
reg = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
realtek,smi-address = <8>;
};
&mdio_bus1 {
reg = <1>;
phy16: ethernet-phy@16 {
reg = <16>;
compatible = "ethernet-phy-ieee802.3-c45";
realtek,smi-address = <2>;
};
}
With this
- the phy reg property still denotes the port number
- the bus number can be derived from the parent bus node.
- the bus address is taken from realtek,smi-address
Refactor bus initialization so it can handle phy nodes below
multiple bus nodes.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
During initialization the mdio driver registers phys with the
iterator "pn". To make clear that it is a phy address rename it
to "addr".
While we are here improve the upper bound check of the maximum
possible address. This is the family specific cpu port and not
the generic upper bound constant for all devices.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In the future the mdio controller will have multiple busses
defined in the dts below the controller node. Nevertheless
it will still hand out only one single bus to the kernel.
Attach the (exported) bus to the controller node instead of
the single (dts) bus subnode.
With this change the mdio lookup in the dsa driver must
be changed to point to the mdio controller node too.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The device specific stp_get() functions can return the state
of a given port individually. No need to disassemble the
device specific state table. Additionally change function
prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21527
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The family specific stp_get() functions have a new return value
that gives the stp status of a given port. Instead of a constant
zero value provide the real data.
While we are here align the RTL930x implementation with the
other ones.
- Drop the debug output
- Make use of priv->r->tbl_access_data_0()
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21527
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The device specific stp_get() function returns a device specific
state to the generic caller. So the caller must use a if/else
statement depending on the family to look into the retrieved data.
Change the signature of the function so it can return a device
independent state of a given port in the future. Additionally
use the new function prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21527
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SGMII only works correctly on this device if inband auto-negotiation is
enabled. Configure the PHY for SGMII and in-band mode in the device tree
to make this happen.
For 2.5G link speeds the PHY will still switch to 2500Base-X without AN.
The same configuration also works on RTL8226, so it is fine to apply
this change to the A1 revision of XGS1010-12/XGS1210-12 as well.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21605
Signed-off-by: Robert Marko <robimarko@gmail.com>
Backport a bunch of upstream commits simplifying the RealTek PHY driver
and re-unifying the C22 and C45 driver instances.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Rework the SerDes mode setting to have a better logical structure,
similar to how RTL931x currently does it. Mode setting is grouped into a
MAC setup and IP core setup. Most modes just need to trigger the MAC
setup and then they work, otherwise some complex sequence is needed.
To achieve that, rename several functions and group their content
differently. While at it, rename some constants to use the RTPCS_ prefix.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x has some helpers which take care of writing the actual mode
value to the corresponding register. They exist for the MAC setup SerDes
mode, the USXGMII submode and the SerDes IP core mode.
To reflect that, adjust the naming of these helpers accordingly. Most
importantly, prefix the helper names with '__'. This is a common
convention to denote helpers/functions which are internal, not intended
for general use and skip certain checks. Those conditions apply to these
helpers. Though they are still used quite often here, this might change
with further cleanups.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Completely replace usage of PHY_INTERFACE_MODE_* in the vast amount of
calibration functions with the SerDes hardware mode.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Set and configure the SerDes mode using the SerDes hardware mode types
instead of PHY_INTERFACE_MODE_*.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use SerDes hardware mode in RTL930x SerDes TX config instead of
PHY_INTERFACE_MODE_* modes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch to using the SerDes hardware mode in RTL930x SerDes patching aka
rtpcs_930x_sds_patch.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Start using the SerDes hardware in the RTL930x SerDes setup entrypoint.
Use the generic mapper (which will be moved out later to pcs_config) to
determine the mode. In the next steps, switch to solely using that
step-by-step.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Convert the update_counter() and net_irq() functions to the
new prefix. For better readability rename "cntr" to "counter".
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21569
Signed-off-by: Robert Marko <robimarko@gmail.com>
The hardware reset is a combined function for all device families.
So it uses several family specific branches to decide what is
really needed. Refactor this into device specific variants to make
it easier to understand.
The cpu port and nic reset sequence is the same for all families.
Provide this with a dedicated function.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21569
Signed-off-by: Robert Marko <robimarko@gmail.com>
The cameo based RTL83xx devices have a simple U-Boot that only
supports gzip compression. Actual models are mainly D-Link
DGS-1210 and the Apresia Light GS120GT-SS. Reduce the image
size by ~1MB by switching over to lzma compression and rt-loader.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21577
Signed-off-by: Robert Marko <robimarko@gmail.com>
The imagebuilder cannot compile source, so we must guard against
generation of artifact targets that require this. Without this
guard we see an error when building the zyxel,gs1920-24hp-v1 profile.
Create standalone rt-loader, loading uimage from address 0xb40c0000
mips-openwrt-linux-musl-gcc -fpic -msoft-float -Iinclude -c -o ... src/startup.S
make[4]: mips-openwrt-linux-musl-gcc: No such file or directory
Signed-off-by: Eric Fahlgren <ericfahlgren@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21556
Signed-off-by: Robert Marko <robimarko@gmail.com>
Rename some of the net_device_ops to the new driver prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21476
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Rename transmit related functions with the new prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21476
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert the mac functions to the new prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21476
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Rename the header tag encoding/decoding functions according
to the new prefix naming convention.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21476
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
All Realtek drivers use ctrl (control) als the central driver
structure. Align that for the ethernet driver. Additionally
use the rteth prefix for the device independent structure
definition. Its current prefix "rtl838x_" is only confusing.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21476
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is currently a mismatch in the detection of the chip type.
rt-loader and the kernel give different revisions. E.g.
rt-loader: Running on RTL9313 (chip id 6567A) with 256MB
kernel: Realtek RTL9313 rev B (6567) SoC with 256 MB
Realtek internal version numbering is
- for RTL838x: 1=A, 2=B, ...
- for others: 0=A, 1=B, ...
rt-loader does not differentiate that. Adapt the calculation to
give a consistent picture.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21498
Signed-off-by: Robert Marko <robimarko@gmail.com>
Initialization of the RTL8214FC was coded like "put the cart
before the horse". Configuration was called from probing
and only when called for the last port.
Testing showed that there is no need to overcomplicate things.
Reorganize the setup as follows:
- Let probe() & config() do what they are meant for
- Split the config part between a package and a port sequence
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21508
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL8214FC is initialized with a minimum driver sequence.
The firmware usage has been made obsolete. Drop leftovers.
These include:
- old code
- firmware file
- kernel config (to include the firmware file into the build)
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21508
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are currently two code paths to initialize the RTL8214FC. One is
for RTL838x, the other for RTL839x. With the recently added minimum
setup sequence the phy will come up and pass traffic on any device.
Use this als the reference implementation and drop the usage of the
magic firmware based setup.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21508
Signed-off-by: Robert Marko <robimarko@gmail.com>
For the GS1920 the build system throws errors like
../dts/rtl8392_zyxel_gs1920-24hp-v1.dts:256.19-29:
Warning (reg_format): /switch@1b000000/ports/port@0:reg:
property has invalid length (4 bytes)
(#address-cells == 2, #size-cells == 1)
The dts misses the address and size properties for the
ports section. Fix that.
Fixes: 2a55846 ("realtek: add support for ZyXEL GS1920-24HPv1")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21534
Signed-off-by: Robert Marko <robimarko@gmail.com>
The interfaces attribute of the mdio bus held the information
about the connection mode (qsgmii, sgmii, ...). This was only
used during the old RTL930x setup. Drop it because it is not
needed any longer.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21469
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Cleanup the RTL930x polling setup. Make use of the
new phy fixup helper to initialize the polling registers.
As an integral update to the logic before only write
register bits that are really in scope. This might save
some bits set by U-Boot.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21469
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The mdio driver currently initializes the phy polling registers
with some nasty magic. It identifies the interface mode from the
dts and draws some strange conclusions.
Looking at the SDK one can see that this is basically dependent
of the attached phy type. So the code location is quite right
inside the mdio driver.
Provide a new get_phy_info() function that determines the phy
characteristics that are important for the polling unit . It will
be later needed by the RTL93xx setup code.
Some explanation about the fields of the structure:
- has_res_reg: phy has a special Realtek resolution polling
register. It is unclear if this gives more details or if it
simply allows faster polling.
- has_giga_lite: This is a phy that allows for Realtek proprietary
1G/2.5G lite connectivity. In this case data is only transmitted
over two wire pairs.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21469
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Currently there are several places where the driver uses the
classic "i" as iterator. In these cases where it iterates
phy ports use "addr" instead to make it easier to read. Do
the same for the smi bus. Additionally forthcomming commits
will show nicer diffs.
While we are here fix the initialization sequence of the private
structure. There is no need to set data to zero that has already
been zero-allocated before. Instead initialize smi_bus[] with
a value of "-1" to denote that a phy is not in scope. This is
essential as some functions already have a matching check in
place.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21469
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The mdio driver was carved out from the ethernet driver long
ago. Remove some leftover defines.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21502
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The mac_addr variable was not zero-initialized, causing weird side effects
when the memory contents were a valid MAC address.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Link: https://github.com/openwrt/openwrt/pull/21504
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The realtek target uses some functions marked __init for initialization.
However, that means they can only be called once when compiled in and
afterwards the memory occupied by them is freed and potentially reused.
Some "impossible" (code at a given location can't crash in the way it
does) crashes can be caused by this because upon re-execution of those
functions, garbage gets executed. Such re-execution can happen for
deferred probes or repeated probes.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Link: https://github.com/openwrt/openwrt/pull/21504
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Until now the RTL8214FC is initialized either by U-Boot (all
devices) or by some magic firmware file (RTL838x). On RTL839x
devices without U-Boot (e.g. ZyXEL GS1920) this PHY cannot
be used.
Provide the most basic setup sequence for RTL839x so that
copper/fiber work. Later it can be taken over for all devices
and the firmware helpers can be dropped.
Remark! This should not (but might) break RTL839x devices with
RTL8214FC U-Boot setup.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21435
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
The RTL8214FC and the RTL8218B share the same register set and
need to be initialized quite similar. In the future the RTl8214FC
will get its own setup sequence. To keep the codebase small the
common parts (serdes & copper) will be covered by the existing
RTL8218B configuration.
Enhance the RTL8218B setup with this separate commit to ensure
that nothing breaks.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21435
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
No need to open code bus locking.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21435
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Commit ab805ec316 ("generic: add missing squashfs config") enabled
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU in the generic config, so it is no
longer needed in the target configs.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Link: https://github.com/openwrt/openwrt/pull/21465
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch RTL838X SerDes setup to use the internal SerDes hardware modes
instead of the PHY_INTERFACE_MODE_* modes.
Use the generic mapper in the beginning of the SerDes setup and convert
all affected functions to the different mode type. This will be moved
out to the generic pcs_config later.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21480
Signed-off-by: Robert Marko <robimarko@gmail.com>
We finally reached the point where PCS has full control over SerDes and
no parts of this are scattered in other drivers anymore. To make that
clear, drop the comment in pcs_config that explains this former state
and remove a warning which states that pcs_config isn't fully
implemented yet.
Add a generic output to at least keep a generic sign of life from the
PCS driver, independently from what the variant-specific code currently
prints.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21481
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a comment stating the situation around a specific RTL838x firmware
file. After SerDes setup has been moved to the PCS driver, this firmware
file is partially unused. If the remaining bits are pulled out or just
replaced, this firmware file can be dropped. The comment ensures that we
do not forget about that.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21481
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove some unused defines for SerDes in the ethernet driver. They have
been missed before but are completely out of place here now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21481
Signed-off-by: Robert Marko <robimarko@gmail.com>
The GS1920-24HPv1 is a switch with 24 copper ports and 4 combo SFP/copper
ports and PoE on the first 24 ports.
Specifications:
---------------
* SoC: Realtek RTL8292M
* Flash: 16 MiB SPI flash
* RAM: 128 MiB
* Ethernet: 24x 10/100/1000 Mbps
* Buttons: 1x "Reset" button
* UART: 1x serial header, standard DCE pinout (Tx = 2, Rx = 3, Gnd = 5);
9600 baud, 8n1, +- 5.6V logic levels
* SFP: 4 combo copper/SFP ports
* PoE: 24x
* Fans: ADT7468 fan controller
Works:
------
- (24) RJ-45 ethernet ports
- Switch functions
- Buttons
- LEDs (partial support, the wrong LEDs light up)
- Manual fan control
Not yet enabled:
----------------
- PoE (requires patches to realtek-poe to support i2c)
- Combo ports (link is up, but no data is transferred)
Fans:
-----
After boot, the fans are running in full speed mode. You can interact
with the fan controller at /sys/class/hwmon/
Installation:
-------------
This device uses ZyNOS instead of Linux, this makes installation a bit
more cumbersome. Serial console is required!
1. Set the switch to boot from the first image. This step is crucial,
it will fail to boot if this is not set properly.
2. Connect to the switch using serial and interrupt the boot process
to enter debug/recovery mode.
3. Load the OpenWrt initramfs image via XMODEM. You need to obtain an
unlock code, based on your MAC address, first. See the excellent write
up at https://www.ixo.de/info/zyxel_uclinux/ for details. Replace
unlock_code in the commands below by the code obtained.
After running ATBA5, the terminal needs to be closed and re-opened
with 115200 baud. This speeds up the file transfer significantly!
The file length in bytes need to be given instead of file_length below.
You also need an XMODEM upload utility like "lrzsz-sx -X" to transfer
the file. Start the XMODEM upload after running the ATUPxxxx command:
> ATEN1,unlock_code
> ATBA5
> ATUP80100000,file_length
> ATGO80100000
4. Wait for OpenWrt to boot. Once this is done, transfer the loader binary
and the sysupgrade image to "/tmp" using scp.
5. Install OpenWrt permanently by running the following two commands on
the switch (over SSH):
> mtd write /tmp/loader.bin loader
> mtd write /tmp/sysupgrade.bin firmware
6. Reboot the switch and enjoy OpenWrt.
NB: You do not need to touch the loader binary unless it's recommended.
The loader is not part of a regular sysupgrade file and will be left
untouched. The boot loader only checks if the loader is valid to be
able to boot.
Recovery/ Return to stock:
--------------------------
Just spam the "u" key during (or "z" for 9600 baud) during memory testing
to trigger a recovery XMODEM upload at 115200 baud. A standard OEM upgrade
image works properly.
Signed-off-by: Andreas Böhler <dev@aboehler.at>
Link: https://github.com/openwrt/openwrt/pull/20439
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
