Part of the phy patch process breaks functionality on non-Realtek
platforms. Only apply this on Realtek SoCs to fix functionality
everywhere else.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21777
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 268a0cb363)
Link: https://github.com/openwrt/openwrt/pull/21799
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The u-boot-env partition on the Zyxel P-2812HNU-F1 is 128 KiB but
the actual environment data is only 8 KiB (0x2000 bytes). Without
the env-size property, the u-boot,env nvmem layout driver assumes
env-size equals the full partition size and computes an incorrect
CRC32 over the entire 128 KiB, causing all nvmem cell reads to fail
silently.
Add env-size = <0x2000> so the CRC32 is computed over the correct
8 KiB region, allowing nvmem-cells (such as ethaddr) to be read
properly by the kernel.
Signed-off-by: Burak Aydos <byhexadecimal@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21780
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 6952844436)
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This reverts commit 53a525f346.
Linux 6.12.67 broke ipip6 tunnel (DS-Lite) and MAP-E.
Revert this Linux kernel bump till the problem is fixed.
Fixes: https://github.com/openwrt/openwrt/issues/21737
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Migration of the eDPU DTS to upstream one broke the eDPU plus model
since the required ethernet aliases are missing and U-Boot then cannot
find the required ethernet nodes.
So, after sending the required fix upstream, lets apply it in OpenWrt
as well.
Fixes: 9852dda410 ("mvebu: move DTS diff into a patch for Methode uDPU")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 3353827fb5)
Add the loop module and mkfs tool to use f2fs/ext4
based overlays. This fixes the following bug:
mount_root: unable to create loop device
mount_root: no usable overlay filesystem found, using tmpfs overlay
Fixes: 99545b4bb1 ("d1: add new target")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
(cherry picked from commit 1e7950a45d)
The USB of most d1 devices works in otg or peripheral mode.
Enable this feature to use usbgadget and fix musb errors:
musb-sunxi 4100000.usb: Invalid or missing 'dr_mode' property
musb-sunxi 4100000.usb: probe with driver musb-sunxi failed with error -22
Fixes: 99545b4bb1 ("d1: add new target")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
(cherry picked from commit 81580cc92c)
The CONFIG_SOFTLOCKUP_DETECTOR_INTR_STORM option shows up when the
OpenWrt option CONFIG_KERNEL_SOFTLOCKUP_DETECTOR is activated.
Link: https://github.com/openwrt/openwrt/pull/21710
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit bf9e90c94e)
The indicator is unused by default and not associated
with the wan port. So let’s fix this.
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21635
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 46ff60ce02)
This is a cosmetic change. There is no need to use mac
address increment/decrement in the dts on these devices,
so this can be simplified.
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21635
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 9bcfe7b76f)
In the original DTS from the device firmware, there are
no entries that enable SPI calibration. Therefore, it
should be disabled.
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21635
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 299105441a)
Keenetic devices always use the WAN port MAC address as
the MAC address printed on the label.
Signed-off-by: Maxim Anisimov <maxim.anisimov.ua@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21635
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 5c195add76)
Add two missing $$ in the factory image build pipeline for MR6350
Signed-off-by: Zeyu Dong <dzy201415@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21682
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 979f70cc7e)
Now that DCB is enabled by default, it makes sense to include it on
lan969x.
While we are here, lets include ip-bridge as these devices are switches
and the Busybox applet does not expose enough functionality.
These devices have no space constraints.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 51710e9dd4)
Update the DTS to the latest pending upstream version, it looks like this
should get merged soon upstream.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit 19e097e18a)
Interrupts for DWC3 node were completely mixed up - SPI interrupt 62 is
not listed in reference manual at all. It was also causing dtbs_check
warnings:
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names:0: 'pwr_event' was expected
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names: ['hs_phy_irq'] is too short
Warning itself was introduced by commit 53c6d854be4e ("dt-bindings: usb:
dwc3: Clean up hs_phy_irq in binding"), but this was trying to bring
sanity to the interrupts overall, although did a mistake for IPQ5018.
IPQ5018 does not have QUSB2 PHY and its interrupts should rather match
ones used in IPQ5332.
Correct it by using interrupts matching the bindings and reference
manual.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21454
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit e1a9636959)
In IPQ5018, the reference clock to the CMN PLL block from the on-board
Wi-Fi has its divider set to 2. This divider wasn't taken into
consideration when calculating the CMN PLL clock rate which meant the
resulting clock rate was doubled.
With the reference clock divider being accounted for in the driver,
correct the assigned clock rate to 4.8GHz.
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21453
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit d6ab889e45)
Add missing dt-bindings/include files needed for compilation of driver.
Enable compilation of the CMN PLL driver by adding the symbols to
Kconfig and Makefile.
Fixes: 468975a985 ("qualcommax: ipq50xx: backport upstreamed patches for adding ipq5018 CMN PLL support")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21453
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit fdce6f99be)
This is tri-band WiFi6E capable router. Also Zyxel Nebula managed so no real local GUI. To open device 4 screws must be located uder the label.
Four latches are on front and two on each side. Better start from ethernet port side where 3 small latches are easy to handle.
FCC shows It's identical to WSQ65 sold as Zyxel Multy M6E but that's nowhare to be found yet. WSQ65 is not covered by this PR
Speficiations:
* SoC: Qualcomm IPQ5018
* RAM: 1GB DDR3
* Flash: Winbond W25N02KWZEIR 256MB
* UART: PCB "J3" is located left from front LED strip
(VCC/TX/RX/ /GND) 3.3V 115200n8
* Wi-Fi1: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax)
* Wi-Fi2: QCN6102 (2x2:2 5 Ghz 802.11an/ac/ax)
* Wi-Fi3: QCN6122 (2x2:2 6 Ghz 802.11an/ac/ax)
* Ethernet: QCA8337 4xLAN 1Gbit / 1xWAN 1Gbit
* Buttons: WPS , Reset
* LEDs: 13 in total
RGB power, RGB wan, RGB status (cloud), RGB wifi, Green wps
* FCCID: I8803891
*Flash Instructions starts with getting root:
connect uart to J3 connector next to the front LEDs
go to failsafe when this shows up in log:
"Press the [f] key and hit [enter] to enter failsafe mode"
execute:
mount_root
passwd -d root
reboot
logon as root:
look for 'Please press Enter to activate this console.'
login is root password is empty
execute:
fw_setenv DebugFlag=0x1
fw_setenv bootdelay=0x2
passwd -d root
backup ubi partition "rootfs" into safe space
reboot
*OpenWrt installation
stop uboot and execute:
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.10
tftpboot *-factory.ubi
flash rootfs
reset
or:
tftpboot *-initramfs-uImage.itb
bootm
use sysupgrade as usual
*restore OEM from backup
stop uboot and execute:
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.10
tftpboot *-initramfs-uImage.itb
bootm
transfer rootfs.bin backup and execute:
ubiformat /dev/mtd16 -y -f /tmp/rootfs.bin
Signed-off-by: Robert Senderek <robert.senderek@10g.pl>
Link: https://github.com/openwrt/openwrt/pull/21042
(cherry picked from commit f948f71300)
Link: https://github.com/openwrt/openwrt/pull/21440
Signed-off-by: Robert Marko <robimarko@gmail.com>
The vr9.dtsi configures the GPIO 38 as reset GPIO. Also the fon LED is
configured on GPIO 38. This conflicts and makes the probing of the PCIe
controller fail in OpenWrt 25.12.
The AVM GPL source code configured GPIO 21 as PCIe reset.
Fixes: https://github.com/openwrt/openwrt/issues/21562
Link: https://github.com/openwrt/openwrt/pull/21641
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit a4285d7cc0)
On some SoCs like RK3399, U-Boot no longer export the serial
address in $stdout variable, it has been changed to something like
`stdout=serial,vidconsole` since video supported was added. So
detect $soc variable instead, this also makes the script more clear.
Addtional note: rk3566 is reported as rk3568, rk3582 is reported as
rk3588 in $soc.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/21610
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 609deedd87)
Hardware:
- RK3528 SoC
- 1x USB 2.0
- 8/32GB eMMC
- 1/2/4GB LPDDR4
- 1x 1GbE RTL8111H
- 1x 1GbE RTL8211F
- MicroSD card slot
Installation:
Use dd or balenaEtcher to flash the firmware.
Note:
The RK3528 SoC does not support MSI-X, so it can't
adjust the interrupts of r8169 to other CPU cores.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
(cherry picked from commit e8997e7e03)
Use the unique MAC address in EEPROM for eth0.
The MAC address of RTL8111H (eth1) is correct.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
(cherry picked from commit 7a07d38f33)
The WAN(eth1) port LED on the Radxa E20C is completely off.
Since the r8169 driver supports configuring LEDs, using it.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
(cherry picked from commit dccfc10957)
ASUS RT-AC3200 and ASUS RT-AC5300 are AC3200 and AC5300 routers,
respectively, featuring 5 Ethernet ports over the integrated Broadcom
switch.
ASUS RT-AC3200 hardware info:
* Processor: Broadcom BCM4709A0 dual-core @ 1.0 GHz
* Switch: BCM53012 in BCM4709A0
* DDR3 RAM: 256 MB
* Flash: 128 MB
* 2.4GHz: BCM43602 3x3 single chip 802.11b/g/n SoC
* 5GHz: BCM43602 3x3 two chips 802.11a/n/ac SoC
* Ports: 4 LAN Ports, 1 WAN Port
ASUS RT-AC5300 hardware info:
* Processor: Broadcom BCM4709C0 dual-core @ 1.4 GHz
* Switch: BCM53012 in BCM4709C0
* DDR3 RAM: 512 MB
* Flash: 128 MB
* 2.4GHz: BCM4366 4x4 single chip 802.11b/g/n SoC
* 5GHz: BCM4366 4x4 two chips 802.11a/n/ac SoC
* Ports: 4 LAN Ports, 1 WAN Port
Flashing instructions:
* Boot to CFE Recovery Mode by holding the reset button while power-on.
* Connect to the router with an ethernet cable.
* Set IPv4 address of the computer to 192.168.1.2 subnet 255.255.255.0.
* Head to http://192.168.1.1.
* Reset NVRAM.
* Upload the OpenWrt image.
CFE bootloader may reject flashing the image due to image integrity check.
In that case, follow the instructions below.
* Rename the OpenWrt image as firmware.trx.
* Run a TFTP server and make it serve the firmware.trx file.
* Run the URL below on a browser or curl.
http://192.168.1.1/do.htm?cmd=flash+-noheader+192.168.1.2:firmware.trx+flash0.trx
Signed-off-by: Chester A. Unal <chester.a.unal@arinc9.com>
(cherry picked from commit 4284d56568)
Due to PTP conflicts with CONFIG_ALL_KMODS which causes the end images
to end up with no switchdev driver included, lets switch to using the
switchdev and PHY drivers as modules instead.
Fixes: 88a404a2d1 ("microchipsw: add support for Microchip LAN969x switches")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
(cherry picked from commit b300a9e63d)
This reverts commit 7390e63374.
This broke SFP handling on some Mediatek SoCs.
Some SFPs are configured for inband/2500base-x link mode and were
rejected with this change.
Fixes: https://github.com/openwrt/openwrt/issues/21436
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 8076376aca)
This adds support for the Airpi AP3000M 5G CPE based on MediaTek MT7981B.
Specifications:
SoC: MediaTek MT7981B (dual-core ARM Cortex-A53)
RAM: 1GB DDR4
Storage: 8GB or 16GB eMMC
Ethernet: 1x 2.5GbE LAN, 1x 1GbE WAN
Wireless: 2.4GHz/5GHz 802.11ax
Buttons: Reset, WPS
LEDs: System, 2.4GHz WiFi, 5GHz WiFi
Cooling: PWM-controlled fan
Expansion: M.2 slot for 5G modem
The factory partition (mmcblk0p2) is empty in stock firmware.
Execute via SSH before flashing OpenWrt:
```
dd if=/lib/firmware/MT7981_iPAiLNA_EEPROM.bin of=/dev/mmcblk0p2 bs=4k count=1
MAC addresses
```
Fixed MAC addresses are derived by macaddr_generate_from_mmc_cid.
Installation via U-Boot web page
Set static IP 192.168.88.2/255.255.255.0 on your computer.
Connect to the 1GbE port (WAN) and hold the reset button while booting the device. Wait for about 6 seconds, and release the reset button.
Open U-boot web page on your browser at http://192.168.88.1
Select the OpenWRT sysupgrade image, upload it, and start the upgrade.
Wait for automatic reboot.
Installation via sysupgrade
Flash the sysupgrade file via LuCI upgrade page without saving the settings.
Signed-off-by: Fil Dunsky <filipp.dunsky@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21397
(cherry picked from commit: 6ff4557317)
Link: https://github.com/openwrt/openwrt/pull/21601
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Build kernel module for cs5535 internal audio for target x86 "legacy" also
(so far only for target x86 "geode")
Signed-off-by: Pierre-Emmanuel Frot <piemfrot@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21596
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit e45ba0ef6e)
The gmac definition has an offset of 1 compared to the label MAC.
Fixes: a55ab9e134 ("mediatek: filogic: prevent faulty mac address assignment")
Signed-off-by: Maximilian Baumgartner <aufhaxer@googlemail.com>
Link: https://github.com/openwrt/openwrt/pull/21560
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 687a2535d5)
Now that there is a consumer board available, lets drop source-only so that
buildbots provide official images.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
The gmac definition has an offset of 1 at the moment. This leads to an
off by one error in downstream projects that rely on the package label mac.
Signed-off-by: Steffen Förster <nemesis@chemnitz.freifunk.net>
Link: https://github.com/openwrt/openwrt/pull/21543
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 66b6791abe)
- adopted MTD partition size increase from 64M to 128M
-> this allows boot to complete
- moved MAC addressing stuff out of partition definitions
- all MAC addressing stuff is in .dtsi
Specifications:
SoC: MediaTek MT7981B
RAM: 256MiB
Flash: Winbond SPI-NAND 128 MiB
Switch: 1 WAN, 3 LAN (Gigabit) MediaTek MT7531
Buttons: Reset, Mesh
Power: DC 12V 1A
WiFi: MT7981B 2.4Ghz & 5.8Ghz
Led Layout from bottom to top:
Power
Mesh (RGB Led, user controllable, default set to OpenWrt Status)
WLAN 2 GHz (user controllable)
WAN (user controllable)
LAN3
LAN2
LAN1
WLAN 5 GHz (Not on front panel but blinks through enclosure,
user controllable)
Buttons:
Reset
Mesh (user controllable, no default function)
Installation:
A. Through U-Boot menu:
- Prepare your connecting computer to use a static IP in
network 192.168.1.0/24
- Power down the router and hold in the Reset button.
- While holding in the button power up the router again.
- Hold the button in for 10 seconds and then release.
- Use your browser to go to 192.168.1.1
- If you see a GUI allowing for flashing firmware then
you got the right model.
- Upload the sysupgrade file.
Note: Recovery GUI can be used to recover from an incorrect
firmware flash.
B. Through OpenWrt Dashboard:
If your router comes with OpenWrt preinstalled
(modified by the seller), you can easily upgrade
by going to the dashboard (192.168.1.1) and then
navigate to System -> Backup/Flash firmware,
then flash the firmware
MAC Addresses were found in Factory partition:
offset 0x4 F8:5E:3C:xx:xx:aa --> Router Label -2
offset 0xa F8:5E:3C:xx:xx:bb --> Router Label -1
offset 0x24 F8:5E:3C:xx:xx:cc --> Router Label +1
offset 0x2a F8:5E:3C:xx:xx:yy --> printed on Router Label
Signed-off-by: Jörg Seitz <github.joeterminal@xoxy.net>
Link: https://github.com/openwrt/openwrt/pull/19823
(cherry picked from commit 479f1403f2)
Link: https://github.com/openwrt/openwrt/pull/21464
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
- Use .dtsi for old z8103ax featuring a 64M Nand
- Prepare .dtsi for model C of z8103ax featuring a 128M Nand
This .dtsi is supposed to match boards labeled as hardware
revision Z8103AX_V01. Model variant D of zbt-z8103ax appears
to use very same board.
DTS include does also
- set wifi mac addresses in &wifi section
- set eth mac addresses in ð section
- set LAN switch mac addresses in &switch section
All of the above allows to get rid of 11_fix_wifi_mac script
Signed-off-by: Jörg Seitz <github.joeterminal@xoxy.net>
Link: https://github.com/openwrt/openwrt/pull/19823
(cherry picked from commit b21b019af4)
Link: https://github.com/openwrt/openwrt/pull/21464
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The patch 950-0019-BCM2708-Add-core-Device-Tree-support.patch creates a
symbolic link. It looks like quilt does not support this and never
refreshed it.
I removed the symbolic link, refreshed the patch and then added it
back again.
Link: https://github.com/openwrt/openwrt/pull/21431
(cherry picked from commit 39700aeaa1)
Link: https://github.com/openwrt/openwrt/pull/21546
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some mpc85xx boards still boot with failsafe configured on a non-LAN
interface. Align the preinit interface with the first DSA port or the
interface that LAN is connected to.
This makes failsafe reachable on devices where the default selection does
not map to the primary LAN port.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21516
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit a73db6d0a0)
Hardware specifications:
- CPU: Freescale/NXP P2020, dual-core PowerPC @ 1 GHz
- RAM: 1 GB DDR3
- Flash: 2 MB NOR, 512 MB NAND
- Networking: 7x Gigabit Ethernet ports (via two Marvell 88E6171
switches, each attached to a different MAC)
- USB: 2x USB 2.0 ports (front panel)
- mini-PCIe slot
- RTC: Ricoh RS5C372A
- 4 buttons (via external MCU)
- 3 LEDs (via external MCU)
- LCD display (via external MCU)
Installation procedure:
1. Obtain the original MAC address table from the stock bootlog, for
example:
setting device eth0 to 00:90:7f:00:00:01
setting device eth1 to 00:90:7f:00:00:02
setting device eth2 to 00:90:7f:00:00:03
setting device eth3 to 00:90:7f:00:00:04
setting device eth4 to 00:90:7f:00:00:05
setting device eth5 to 00:90:7f:00:00:06
setting device eth6 to 00:90:7f:00:00:07
2. Open the case and move jumper JP1 from 2-3 to 1-2 to enter FAILSAFE
mode.
3. Power on the device and interrupt the boot process to access the U-Boot
shell.
4. Program the MAC base address into the EEPROM (text after '#' is a
comment):
mac ports 3
mac 2 00:90:7f:00:00:01 # first MAC address from bootlog
mac save
5. Reset the device and enter the U-Boot console again.
6. Connect a TFTP server to port 6 and boot the initramfs image:
setenv ipaddr 192.168.1.3
setenv serverip 192.168.1.2
setenv loadaddr 1000000
tftpboot $loadaddr openwrt-mpc85xx-p2020-watchguard_xtm330-initramfs-kernel.bin
bootm $loadaddr
7. (Optional) Backup all MTD partitions if you want the ability to restore
stock firmware.
8. Perform a normal sysupgrade from the initramfs environment.
9. Power off the device and move jumper JP1 back to 2-3.
10. The device will now boot OpenWrt.
Known issues:
- LCD, buttons and LEDs are controlled by an external MCU; the protocol is
currently unknown.
- The internal connection between the two Marvell switches is unused by
OpenWrt.
- The stock firmware uses an empty U-Boot environment; saving variables
modifies the environment and prevents a normal boot. FAILSAFE U-Boot
remains functional.
- WatchGuard configuration is encrypted; DSA MAC addresses are stored in
this configuration.
- Failsafe Ethernet works on port1.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21020
(cherry picked from commit 6150f9ceab)
Link: https://github.com/openwrt/openwrt/pull/21517
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mac_addr variable was not zero-initialized, causing weird side effects
when the memory contents were a valid MAC address.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Link: https://github.com/openwrt/openwrt/pull/21504
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
(cherry picked from commit 19b8d391a9)
Newer Cudy WR3000H units have a Motorcomm YT8821 PHY instead of a
Realtek PHY on the WAN port. Before this commit, the Motorcomm PHY
could not be autodetected by the kernel -- the PHY would show up as
just a generic clause 45 PHY and the proper driver would not be loaded.
The cause of the detection failure likely was that the YT8821 PHY was
held in reset during PHY detection. To fix this, move the reset GPIO
definition to the MDIO bus level. This reset line is deasserted before
the autodetection process, see also [1]. With this change, both Realtek
and Motorcomm PHYs can be supported with a single device tree.
[1]: https://lore.kernel.org/all/20251119134750.394655-1-horatiu.vultur@microchip.com/
Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21399
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit 02f0efd60b)
Recent Cudy WR3000H v1 units have a Motorcomm YT8821 2.5G PHY for
the WAN interface instead of the RTL8221B PHY used in earlier units,
so add kmod-phy-motorcomm to be able to use it.
Signed-off-by: Andrew MacIntyre <andymac@pcug.org.au>
[linuxtardis@gmail.com: slightly reworded the commit description]
Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21399
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
(cherry picked from commit dbafbab876)
These patches were actually merged in kernel 6.19 instead of 6.18,
fix them to avoid confusing when moving to new kernel version.
While at it, refresh the RK3528 PCIE L1ss patch since it was
accepted in 6.19 as well.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/21419
(cherry picked from commit c79fa27cbf)
Link: https://github.com/openwrt/openwrt/pull/21448
Signed-off-by: Robert Marko <robimarko@gmail.com>
