qualcommax: ipq50xx: Add support for Zyxel SCR50AXE
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This is tri-band WiFi6E capable router. Also Zyxel Nebula managed so no real local GUI. To open device 4 screws must be located uder the label.
Four latches are on front and two on each side. Better start from ethernet port side where 3 small latches are easy to handle.
FCC shows It's identical to WSQ65 sold as Zyxel Multy M6E but that's nowhare to be found yet. WSQ65 is not covered by this PR

Speficiations:
* SoC: Qualcomm IPQ5018
* RAM: 1GB DDR3
* Flash: Winbond W25N02KWZEIR 256MB
* UART: PCB "J3"  is located left from front LED strip
              (VCC/TX/RX/     /GND)   3.3V 115200n8
* Wi-Fi1: IPQ5018 (2x2 2.4 Ghz 802.11b/g/n/ax)
* Wi-Fi2: QCN6102 (2x2:2 5 Ghz 802.11an/ac/ax)
* Wi-Fi3: QCN6122 (2x2:2 6 Ghz 802.11an/ac/ax)
* Ethernet: QCA8337 4xLAN 1Gbit / 1xWAN 1Gbit
* Buttons: WPS , Reset
* LEDs: 13 in total
   RGB power, RGB wan, RGB status (cloud), RGB wifi, Green wps
* FCCID: I8803891

*Flash Instructions starts with getting root:
connect uart to J3 connector next to the front LEDs
go to failsafe when this shows up in log:
"Press the [f] key and hit [enter] to enter failsafe mode"
execute:
mount_root
passwd -d root
reboot

logon as root:
look for 'Please press Enter to activate this console.'
login is root password is empty
execute:
fw_setenv DebugFlag=0x1
fw_setenv bootdelay=0x2
passwd -d root
backup ubi partition "rootfs" into safe space
reboot

*OpenWrt installation
stop uboot and execute:
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.10
tftpboot *-factory.ubi
flash rootfs
reset

or:
tftpboot *-initramfs-uImage.itb
bootm
use sysupgrade as usual

*restore OEM from backup
stop uboot and execute:
setenv ipaddr 192.168.1.1
setenv serverip 192.168.1.10
tftpboot *-initramfs-uImage.itb
bootm
transfer rootfs.bin backup and execute:
ubiformat /dev/mtd16 -y -f /tmp/rootfs.bin

Signed-off-by: Robert Senderek <robert.senderek@10g.pl>
Link: https://github.com/openwrt/openwrt/pull/21042
(cherry picked from commit f948f71300)
Link: https://github.com/openwrt/openwrt/pull/21440
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Robert Senderek 2025-10-10 14:40:21 +02:00 committed by Robert Marko
parent ebf9f13938
commit 27b48d0002
7 changed files with 462 additions and 9 deletions

View file

@ -10,7 +10,8 @@ board=$(board_name)
case "$board" in
cmcc,pz-l8|\
elecom,wrc-x3000gs2|\
iodata,wn-dax3000gr)
iodata,wn-dax3000gr|\
zyxel,scr50axe)
ubootenv_add_mtd "0:appsblenv" "0x0" "0x40000" "0x20000"
;;
glinet,gl-b3000)

View file

@ -6,9 +6,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git
PKG_SOURCE_DATE:=2025-12-16
PKG_SOURCE_VERSION:=10eddd6f1cbabd1972a71526d979033325f958c6
PKG_MIRROR_HASH:=1fd55a5cf582f131a371d70de5919b7e54c6ecdc078991dd8a2d21469976c12f
PKG_SOURCE_DATE:=2026-01-07
PKG_SOURCE_VERSION:=11715a4fe783425625a061618e7caa5c56b03323
PKG_MIRROR_HASH:=c8e2d70045a10350671645863bc93019629399c4ed9c211ae6071895188fb958
PKG_FLAGS:=nonshared
include $(INCLUDE_DIR)/package.mk
@ -105,7 +105,8 @@ ALLWIFIBOARDS:= \
zte_mf287 \
zte_mf287plus \
zyxel_nbg7815 \
zyxel_nwa210ax
zyxel_nwa210ax \
zyxel_scr50axe
ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
@ -287,5 +288,6 @@ $(eval $(call generate-ipq-wifi-package,zte_mf287,ZTE MF287))
$(eval $(call generate-ipq-wifi-package,zte_mf287plus,ZTE MF287Plus))
$(eval $(call generate-ipq-wifi-package,zyxel_nbg7815,Zyxel NBG7815))
$(eval $(call generate-ipq-wifi-package,zyxel_nwa210ax,Zyxel NWA210AX))
$(eval $(call generate-ipq-wifi-package,zyxel_scr50axe,Zyxel SCR50AXE))
$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))

View file

@ -0,0 +1,426 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ipq5018.dtsi"
#include "ipq5018-ess.dtsi"
#include "ipq5018-qcn6122.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Zyxel SCR50AXE";
compatible ="zyxel,scr50axe", "qcom,ipq5018";
aliases {
label-mac-device = &dp2;
led-boot = &led_power_blue;
led-failsafe = &led_power_red;
led-upgrade = &led_power_green;
led-running = &led_power_green;
serial0 = &blsp1_uart1;
};
chosen {
bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M";
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
reset {
label = "reset";
gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_power_red: R1 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_POWER;
gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
};
led_power_green: G1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_POWER;
gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
};
led_power_blue: B1 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
};
R2 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN;
gpios = <&tlmm 26 GPIO_ACTIVE_HIGH>;
};
G2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>;
};
B2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN;
gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
};
R3 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&tlmm 25 GPIO_ACTIVE_HIGH>;
};
G3 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&tlmm 34 GPIO_ACTIVE_HIGH>;
};
B3 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&tlmm 24 GPIO_ACTIVE_HIGH>;
};
R4 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN_6GHZ;
gpios = <&tlmm 31 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy2radio";
};
G4 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN_2GHZ;
gpios = <&tlmm 33 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0radio";
};
B4 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN_5GHZ;
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1radio";
};
G5 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WPS;
gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
};
};
};
&switch {
status = "okay";
switch_mac_mode = <MAC_MODE_SGMII_CHANNEL0>;
qcom,port_phyinfo {
port@0 {
port_id = <1>;
mdiobus = <&mdio0>;
phy_address = <7>;
};
port@1 {
port_id = <2>;
forced-speed = <1000>;
forced-duplex = <1>;
};
};
};
&dp1 {
status = "okay";
label = "wan";
nvmem-cells = <&macaddr_appsblenv_ethaddr 0>;
nvmem-cell-names = "mac-address";
};
&dp2 {
status = "okay";
nvmem-cells = <&macaddr_appsblenv_ethaddr (-4)>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&mdio0 {
status = "okay";
};
&mdio1 {
status = "okay";
pinctrl-0 = <&mdio1_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
qca8337_0: ethernet-phy@0 {
reg = <0>;
};
qca8337_1: ethernet-phy@1 {
reg = <1>;
};
qca8337_2: ethernet-phy@2 {
reg = <2>;
};
qca8337_3: ethernet-phy@3 {
reg = <3>;
};
ethernet-switch@17 {
compatible = "qca,qca8337";
reg = <0x17>;
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&qca8337_0>;
};
port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&qca8337_1>;
};
port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&qca8337_2>;
};
port@4 {
reg = <4>;
label = "lan4";
phy-handle = <&qca8337_3>;
};
port@6 {
reg = <6>;
phy-mode = "sgmii";
ethernet = <&dp2>;
qca,sgmii-enable-pll;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&sleep_clk {
clock-frequency = <32000>;
};
&xo_board_clk {
clock-div = <4>;
clock-mult = <1>;
};
&blsp1_uart1 {
status = "okay";
pinctrl-0 = <&serial_0_pins>;
pinctrl-names = "default";
};
&crypto {
status = "okay";
};
&cryptobam {
status = "okay";
};
&prng {
status = "okay";
};
&qfprom {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
pinctrl-0 = <&qpic_pins>;
pinctrl-names = "default";
status = "okay";
nand@0 {
compatible = "spi-nand";
reg = <0>;
nand-ecc-engine = <&qpic_nand>;
nand-bus-width = <8>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partitions {
compatible = "qcom,smem-part";
partition-0-appsblenv {
compatible = "fixed-partitions";
label = "0:appsblenv";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "env-data";
reg = <0x0 0x40000>;
nvmem-layout {
compatible = "u-boot,env";
macaddr_appsblenv_ethaddr: ethaddr {
compatible = "mac-base";
#nvmem-cell-cells = <1>;
};
};
};
};
};
};
};
&tlmm {
mdio1_pins: mdio-state {
mdc-pins {
pins = "gpio36";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio-pins {
pins = "gpio37";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
leds_pins: leds-pins {
pins = "gpio26", "gpio35", "gpio32", "gpio25", "gpio34",
"gpio24", "gpio31", "gpio33", "gpio30", "gpio10",
"gpio11", "gpio12", "gpio40";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
button_pins: button-pins {
pins = "gpio22", "gpio38";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
qpic_pins: qpic-state {
clock-pins {
pins = "gpio9";
function = "qspi_clk";
drive-strength = <8>;
bias-disable;
};
cs-pins {
pins = "gpio8";
function = "qspi_cs";
drive-strength = <8>;
bias-disable;
};
data-pins {
pins = "gpio4", "gpio5", "gpio6", "gpio7";
function = "qspi_data";
drive-strength = <8>;
bias-disable;
};
};
serial_0_pins: uart0-state {
pins =
"gpio20", // RX
"gpio21"; // TX
function = "blsp0_uart0";
drive-strength = <8>;
bias-disable;
};
};
&q6_region {
reg = <0x0 0x4b000000 0x0 0x4d00000>;
};
&wifi {
status = "okay";
qcom,rproc = <&q6_wcss_pd1>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd1";
qcom,ath11k-calibration-variant = "Zyxel-SCR50AXE";
qcom,ath11k-fw-memory-mode = <1>;
qcom,bdf-addr = <0x4c400000>;
};
&wifi1 {
status = "okay";
qcom,rproc = <&q6_wcss_pd2>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd2";
qcom,ath11k-calibration-variant = "Zyxel-SCR50AXE-5G";
qcom,ath11k-fw-memory-mode = <1>;
qcom,bdf-addr = <0x4d100000>;
qcom,m3-dump-addr = <0x4df00000>;
};
&wifi2 {
status = "okay";
qcom,rproc = <&q6_wcss_pd3>;
qcom,userpd-subsys-name = "q6v5_wcss_userpd3";
qcom,ath11k-calibration-variant = "Zyxel-SCR50AXE-6G";
qcom,ath11k-fw-memory-mode = <1>;
qcom,bdf-addr = <0x4e500000>;
qcom,m3-dump-addr = <0x4f200000>;
};

View file

@ -218,3 +218,18 @@ define Device/yuncore_ax850
ipq-wifi-yuncore_ax850
endef
TARGET_DEVICES += yuncore_ax850
define Device/zyxel_scr50axe
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Zyxel
DEVICE_MODEL := SCR50AXE
SOC := ipq5018
BLOCKSIZE := 128k
PAGESIZE := 2048
NAND_SIZE := 256m
DEVICE_DTS_CONFIG := config@mp03.5-c1
DEVICE_PACKAGES := ath11k-firmware-ipq5018-qcn6122 \
ipq-wifi-zyxel_scr50axe
endef
TARGET_DEVICES += zyxel_scr50axe

View file

@ -9,7 +9,8 @@ ipq50xx_setup_interfaces()
case $board in
elecom,wrc-x3000gs2|\
iodata,wn-dax3000gr|\
linksys,mr5500)
linksys,mr5500|\
zyxel,scr50axe)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
;;
glinet,gl-b3000)

View file

@ -10,7 +10,8 @@ case "$FIRMWARE" in
"ath11k/IPQ5018/hw1.0/cal-ahb-c000000.wifi.bin")
case "$board" in
elecom,wrc-x3000gs2|\
iodata,wn-dax3000gr)
iodata,wn-dax3000gr|\
zyxel,scr50axe)
caldata_extract "0:art" 0x1000 0x20000
wlan_mac=$(mtd_get_mac_ascii 0:appsblenv wifi0)
ath11k_patch_mac $wlan_mac 0
@ -54,7 +55,8 @@ case "$FIRMWARE" in
"ath11k/QCN6122/hw1.0/cal-ahb-b00a040.wifi.bin")
case "$board" in
elecom,wrc-x3000gs2|\
iodata,wn-dax3000gr)
iodata,wn-dax3000gr|\
zyxel,scr50axe)
caldata_extract "0:art" 0x26800 0x20000
wlan_mac=$(mtd_get_mac_ascii 0:appsblenv wifi1)
ath11k_patch_mac $wlan_mac 0
@ -95,6 +97,11 @@ case "$FIRMWARE" in
label_mac=$(mtd_get_mac_ascii devinfo hw_mac_addr)
ath11k_patch_mac $(macaddr_add $label_mac 4) 0
ath11k_remove_regdomain
;;
zyxel,scr50axe)
caldata_extract "0:art" 0x4C000 0x20000
wlan_mac=$(mtd_get_mac_ascii 0:appsblenv wifi2)
ath11k_patch_mac $wlan_mac 0
ath11k_set_macflag
;;
esac

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@ -229,7 +229,8 @@ platform_do_upgrade() {
nand_do_upgrade "$1"
;;
yuncore,ax830|\
yuncore,ax850)
yuncore,ax850|\
zyxel,scr50axe)
CI_UBIPART="rootfs"
remove_oem_ubi_volume ubi_rootfs
remove_oem_ubi_volume bt_fw