Fix parsing ABI when package has multiple tags and apk returns them in a
single line.
Fixes: 31cdd13d ("imagebuilder: add ABI suffix to packages when using apk")
Signed-off-by: George Sapkin <george@sapk.in>
Link: https://github.com/openwrt/openwrt/pull/21660
Signed-off-by: Robert Marko <robimarko@gmail.com>
The vr9.dtsi configures the GPIO 38 as reset GPIO. Also the fon LED is
configured on GPIO 38. This conflicts and makes the probing of the PCIe
controller fail in OpenWrt 25.12.
The AVM GPL source code configured GPIO 21 as PCIe reset.
Fixes: https://github.com/openwrt/openwrt/issues/21562
Link: https://github.com/openwrt/openwrt/pull/21641
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Standalone image builder doesn't have a repositories file as all
packages are included, which causes:
ERROR: failed to read repositories: PATH_TO_BUILDER/repositories: No such file or directory
The images are still built, so this is more of an informational error.
Pass related argument to apk only when CONFIG_IB_STANDALONE is not set.
Fixes: a8d17c21 ("imagebuilder: actually support IB from buildbot")
Signed-off-by: George Sapkin <george@sapk.in>
Link: https://github.com/openwrt/openwrt/pull/21658
Signed-off-by: Robert Marko <robimarko@gmail.com>
Update the DTS to the latest pending upstream version, it looks like this
should get merged soon upstream.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This enables the kernel configuration option
to build the SUN50I_A100 driver, which is
the one driver used by the D1 for the RGB
LED controller.
Signed-off-by: Gabriel Roper <lockheedmaniac@gmail.com>
This adds the device tree patches written by Samuel Holland
to the kernel. The driver was merged into mainline Linux in 6.8,
but the device tree patches were never merged into mainline.
Signed-off-by: Gabriel Roper <lockheedmaniac@gmail.com>
Add the loop module and mkfs tool to use f2fs/ext4
based overlays. This fixes the following bug:
mount_root: unable to create loop device
mount_root: no usable overlay filesystem found, using tmpfs overlay
Fixes: 99545b4bb1 ("d1: add new target")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
The USB of most d1 devices works in otg or peripheral mode.
Enable this feature to use usbgadget and fix musb errors:
musb-sunxi 4100000.usb: Invalid or missing 'dr_mode' property
musb-sunxi 4100000.usb: probe with driver musb-sunxi failed with error -22
Fixes: 99545b4bb1 ("d1: add new target")
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Add devm for ioremap to proper cleanup.
Test gpiod_direction_input for failure.
Remove rb91x_nand_release and fix wrong usage.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21165
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL8218D currently relies on proper U-Boot configuration. In
case that is not possible, provide a basic setup sequence that can
bring the PHY "alive". The SDK provides multiple configuration
sequences for two operation modes (XSGMII or QSGMII) and the different
SoC families. Due to limited testing resources only provide a setup
for RTL93xx devices and both modes at the moment.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21551
Signed-off-by: Robert Marko <robimarko@gmail.com>
This default pinctrl doesn't work at all. We must add pinctrl phandle
to the ethernet-phy node or mac node. This patch removed the internal
phy LED pinctrl group definitions from the SOC dtsi because it is
currently only used by one device. Some incorrect LED pinctrls also
have been removed because these devices do not have hardware phy LED.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The PCIe NIC WED offload features depend on it. Also add the missing
"syscon" compatible for the wed_pcie node as it's accessed by
syscon_regmap_lookup_by_phandle().
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These stuffs were copied from the vendor SDK. There are currently
no drivers compatible with them. The pending upstream patches did
not include them either.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This is in preparation for the next update to EcoNet Ethernet driver
which will be using real resets rather than bit-bashing. Patches are
backported up to the current state of clk-next because I intend on
upstreaming these patches soon.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/21545
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
On some SoCs like RK3399, U-Boot no longer export the serial
address in $stdout variable, it has been changed to something like
`stdout=serial,vidconsole` since video supported was added. So
detect $soc variable instead, this also makes the script more clear.
Addtional note: rk3566 is reported as rk3568, rk3582 is reported as
rk3588 in $soc.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/21610
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The dts for RTL93xx devices has duplicate data about the
smi bus of a phy node. The parent node declares the number
of the bus and the realtek,smi-address attribute does the
same.
Remove the bus part from the realtek,smi-address attribute
and lookup the bus from the parent node. While we are here
remove all realtek,smi-address attributes where phy id
matches the bus address. The driver will use that as a
fallback.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Switch the mdio bus topology for devices that have their phys
attached to bus 1-3. This does not have any impact because
the mdio driver was completly redisgned
With this commit the bus id is stored twice. Once in the (new)
bus and in the (old) realtek,smi-address property. E.g.
&mdio_bus1 {
reg = <1>; <<< bus id
phy24: ethernet-phy@24 {
reg = <26>;
compatible = "ethernet-phy-ieee802.3-c22";
realtek,smi-address = <1 2>; <<< bus & address id
};
};
This redundancy will be removed later.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
RTL93xx devices have 4 smi busses (0-3). Add them to the dts.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mdio driver currently determines the smi bus and address from the
realtek,smi-address attribute of the phy. To better reflect the
topology and align with upstream, the phys should be relocated below
their associated bus. As an interim solution the following dts notation
is in focus.
mdio_ctrl: mdio-controller {
mdio_bus0: mdio-bus@0 {
reg = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
compatible = "ethernet-phy-ieee802.3-c45";
realtek,smi-address = <8>;
};
&mdio_bus1 {
reg = <1>;
phy16: ethernet-phy@16 {
reg = <16>;
compatible = "ethernet-phy-ieee802.3-c45";
realtek,smi-address = <2>;
};
}
With this
- the phy reg property still denotes the port number
- the bus number can be derived from the parent bus node.
- the bus address is taken from realtek,smi-address
Refactor bus initialization so it can handle phy nodes below
multiple bus nodes.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
During initialization the mdio driver registers phys with the
iterator "pn". To make clear that it is a phy address rename it
to "addr".
While we are here improve the upper bound check of the maximum
possible address. This is the family specific cpu port and not
the generic upper bound constant for all devices.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In the future the mdio controller will have multiple busses
defined in the dts below the controller node. Nevertheless
it will still hand out only one single bus to the kernel.
Attach the (exported) bus to the controller node instead of
the single (dts) bus subnode.
With this change the mdio lookup in the dsa driver must
be changed to point to the mdio controller node too.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21438
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The device specific stp_get() functions can return the state
of a given port individually. No need to disassemble the
device specific state table. Additionally change function
prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21527
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The family specific stp_get() functions have a new return value
that gives the stp status of a given port. Instead of a constant
zero value provide the real data.
While we are here align the RTL930x implementation with the
other ones.
- Drop the debug output
- Make use of priv->r->tbl_access_data_0()
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21527
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The device specific stp_get() function returns a device specific
state to the generic caller. So the caller must use a if/else
statement depending on the family to look into the retrieved data.
Change the signature of the function so it can return a device
independent state of a given port in the future. Additionally
use the new function prefix.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21527
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Due to PTP conflicts with CONFIG_ALL_KMODS which causes the end images
to end up with no switchdev driver included, lets switch to using the
switchdev and PHY drivers as modules instead.
Fixes: 88a404a2d1 ("microchipsw: add support for Microchip LAN969x switches")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
This reverts commit 7390e63374.
This broke SFP handling on some Mediatek SoCs.
Some SFPs are configured for inband/2500base-x link mode and were
rejected with this change.
Fixes: https://github.com/openwrt/openwrt/issues/21436
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
SGMII only works correctly on this device if inband auto-negotiation is
enabled. Configure the PHY for SGMII and in-band mode in the device tree
to make this happen.
For 2.5G link speeds the PHY will still switch to 2500Base-X without AN.
The same configuration also works on RTL8226, so it is fine to apply
this change to the A1 revision of XGS1010-12/XGS1210-12 as well.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/21605
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit adds support for the Cudy LT400E v1,
an indoor 4G/LTE WiFi router.
It has 4x10/100 Mbps Ethernet ports, a 2.4 GHz radio,
and a Quectel 4G/LTE EC200A modem.
Hardware:
SoC: MediaTek MT7628NN
Flash: 8 MiB SPI
RAM: 64 MiB
Ethernet: 4x10/100 Mbps
WiFi: 2.4 GHz (embedded MT7628, 802.11n)
WWAN: Quectel EC200A-EL 4G/LTE Cat 4 modem
SIM: nano-SIM slot
Buttons: 1 Reset button, 1 WPS button
LEDs: 10x (blue)
Power: 12 V DC barrel jack
Installation:
The stock firmware is a customized variant of OpenWrt, which implements
a signature check that only allows flashing official firmware. Cudy
offers, on their website [1][6], intermediate OpenWrt firmware images
which do not implement the signature check. After flashing the
intermediate image, the upstream (i.e., official) OpenWrt image can be
installed. See the device's entry in OpenWrt's Wiki for more details [2].
Cellular network:
The Quectel EC200A modem is internally connected to the SoC via USB, and
operates in ECM mode, supported by the CDC Ether driver [3]. When
inserting a SIM card in the slot, if no PIN is needed, the network
interface "usb0" is brought up and the cellular connection works out of
the box. To interact with the modem directly (unlock the PIN, change APN
and PDP settings, etc.), AT commands can be sent with picocom to serial
port /dev/ttyUSB2 [4].
Recovery:
The stock firmware can be recovered via TFTP, as the bootloader (based
on U-Boot) implements a recovery client. Set up a TFTP server on your
computer with IP 192.168.88.1/24 serving the stock firmware from Cudy's
website renamed to "recovery.bin". Press the Reset button (keep it
pressed), power on the device, wait for the TFTP server to send the
recovery.bin file, then release the Reset button. The router will take a
couple of minutes to reboot and set up the stock firmware. See the
device's entry in OpenWrt's Wiki for more details [2].
Discussion:
Use the dedicated thread in OpenWrt's forum to discuss any aspects [5].
Acknowledgments:
The code to support this device is largely based on the sources kindly
provided by Cudy in compliance with the GPL license. Thanks for
supporting the OpenWrt community.
Links:
[1] https://www.cudy.com/blogs/faq/openwrt-software-download
[2] https://openwrt.org/toh/cudy/lt400e_v1
[3] https://openwrt.org/docs/guide-user/network/wan/wwan/ethernetoverusb_cdc
[4] https://openwrt.org/docs/guide-user/network/wan/wwan/at_commands
[5] https://forum.openwrt.org/t/242466
[6] https://drive.google.com/drive/folders/1BKVarlwlNxf7uJUtRhuMGUqeCa5KpMnj
Co-authored-by: rogerpueyo <roger.pueyo@guifi.net>
Signed-off-by: Kamil Jońca <kjonca@onet.pl>
Link: https://github.com/openwrt/openwrt/pull/21246
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport a bunch of upstream commits simplifying the RealTek PHY driver
and re-unifying the C22 and C45 driver instances.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Hardware:
- RK3528 SoC
- 1x USB 2.0
- 8/32GB eMMC
- 1/2/4GB LPDDR4
- 1x 1GbE RTL8111H
- 1x 1GbE RTL8211F
- MicroSD card slot
Installation:
Use dd or balenaEtcher to flash the firmware.
Note:
The RK3528 SoC does not support MSI-X, so it can't
adjust the interrupts of r8169 to other CPU cores.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
The WAN(eth1) port LED on the Radxa E20C is completely off.
Since the r8169 driver supports configuring LEDs, using it.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Currently, the LED names generated by the r8169 driver are the
network port names renamed by udev, such as enp1s0. Add a hack
patch to restore the interface name to match OpenWrt.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Build kernel module for cs5535 internal audio for target x86 "legacy" also
(so far only for target x86 "geode")
Signed-off-by: Pierre-Emmanuel Frot <piemfrot@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21596
Signed-off-by: Robert Marko <robimarko@gmail.com>
The gmac definition has an offset of 1 compared to the label MAC.
Fixes: a55ab9e134 ("mediatek: filogic: prevent faulty mac address assignment")
Signed-off-by: Maximilian Baumgartner <aufhaxer@googlemail.com>
Link: https://github.com/openwrt/openwrt/pull/21560
Signed-off-by: Robert Marko <robimarko@gmail.com>
More rust symbols that are detected using scripts or based on the rust
version have been added. Filter them out.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
Link: https://github.com/openwrt/openwrt/pull/21554
Signed-off-by: Robert Marko <robimarko@gmail.com>
Rework the SerDes mode setting to have a better logical structure,
similar to how RTL931x currently does it. Mode setting is grouped into a
MAC setup and IP core setup. Most modes just need to trigger the MAC
setup and then they work, otherwise some complex sequence is needed.
To achieve that, rename several functions and group their content
differently. While at it, rename some constants to use the RTPCS_ prefix.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL930x has some helpers which take care of writing the actual mode
value to the corresponding register. They exist for the MAC setup SerDes
mode, the USXGMII submode and the SerDes IP core mode.
To reflect that, adjust the naming of these helpers accordingly. Most
importantly, prefix the helper names with '__'. This is a common
convention to denote helpers/functions which are internal, not intended
for general use and skip certain checks. Those conditions apply to these
helpers. Though they are still used quite often here, this might change
with further cleanups.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Completely replace usage of PHY_INTERFACE_MODE_* in the vast amount of
calibration functions with the SerDes hardware mode.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Set and configure the SerDes mode using the SerDes hardware mode types
instead of PHY_INTERFACE_MODE_*.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Use SerDes hardware mode in RTL930x SerDes TX config instead of
PHY_INTERFACE_MODE_* modes.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch to using the SerDes hardware mode in RTL930x SerDes patching aka
rtpcs_930x_sds_patch.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
Start using the SerDes hardware in the RTL930x SerDes setup entrypoint.
Use the generic mapper (which will be moved out later to pcs_config) to
determine the mode. In the next steps, switch to solely using that
step-by-step.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21565
Signed-off-by: Robert Marko <robimarko@gmail.com>
