mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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43b1d16567
This change will fix erase address configuration for QSPI nand devices whose density is beyond 128MiB. To erase a block as per datasheet of serial nand device page row address <5:0> and the Block row address <16:6>. In code we are forming directly pages address starting from <16:0> i.e 17-bit address. Currently we are configuring address_0 and address_1 register as follws. addr0 = (page << 16) and addr1 = 0x0; This logic will work if device size upto 128MiB, but if device size beyond 128MiB then this logic will fail becasue upper most bit will go out of add0 register. Fixing this by changing address configuration logic for erase block. addr0 = (page << 16) addr1 = (page >> 16) & 0xffff; Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org> Change-Id: I4950bb611780257629491ffbb42c91fcfedebc58 |
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| .. | ||
| nand | ||
| onenand | ||
| spi | ||
| ubi | ||
| altera_qspi.c | ||
| at45.c | ||
| cfi_flash.c | ||
| cfi_mtd.c | ||
| dataflash.c | ||
| ftsmc020.c | ||
| ipq_spi_flash.c | ||
| jedec_flash.c | ||
| Kconfig | ||
| Makefile | ||
| mtd-uclass.c | ||
| mtd_uboot.c | ||
| mtdconcat.c | ||
| mtdcore.c | ||
| mtdcore.h | ||
| mtdpart.c | ||
| mw_eeprom.c | ||
| st_smi.c | ||