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2c13362d84
This change will add support for serial nand. QPIC-2.1.1 supports parallel nand as well as serial nand. QPIC will operate either in parallel configuration or serial nand. Both can't work together. This change will support initially four serial nand parts. MT29F1G01ABBFDWB-IT (Micron-0x2C,0x15, 2K + 128) GD5F1GQ4RE9IG (Giga Device-0xC8,0xC1, 2K + 128) GD5F2GQ5REYIH (Giga Device-0xC8,0x22, 2K + 64) GD5F1GQ4RE9IH (Giga Device-0xC8, 0xC9, 2K + 64) Device Internal ECC is disabled for all three devices. This change will enabele QPIC ECC engine. For MT29F1G01ABBFDWB-IT 4-bit ECC as well 8-bit ECC will be supported. For GD5F1GQ4RE9IG 4-bit ECC as well 8-bit ECC will be supported. For GD5F2GQ5REYIH only 4-bit ECC will be supported due to 64-bytes spare. For GD5F1GQ4RE9IH only 4-bit ECC will be supported due to 64-bytes spare. Change-Id: I3f38f9c76b7bb235bb335a481fbc42ae1bd00395 Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org> |
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