Currently, if atf env is set in the secure board. secure boot
sequence gets bypassed. This is not an expected behaviour. So,
removed support the atf env variable. Instead atf enabled status
can be verified using get_secure_state scm call.
Moreover, as per current design get_secure_state scm call will
not be implemented in ATF in future as well. If its implemented,
Bit 7 should be made to 1.
Change-Id: I0adcfac7bbcb10fe6906fd8a3f10a440ec7080ae
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This patch updates the following:
1) Initializes I2C QUP clocks in U-Boot itself as required
without depending on SBL.
2) Removes all CONFIG_IPQ9574_RUMI references.
Change-Id: I1fb02861a70bd2b024122fff7810c3373cc2e1cd
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
This patch updates the default uniphy mode to SGMII
for the qca808x ports. If suppose, the phy is capable
of supporting 2.5G, then it will reconfigure the
uniphy mode to SGMII_PLUS at that time based on the
link speed detected.
Change-Id: I56692b19536e71cbcf3a4c31d32ecb29866c5fdc
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
In case of runtime failure, xBL updates NonHLOS partitions
and HLOS as well in NAND case. Make the print generic.
Change-Id: I7d75ac7c1d730c4bff3fe693fc3623e56a19b494
Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
1. Modified ipq5018-mp02.1.dts and added NAND alias and description
Change-Id: I6043168712b2b8e54780fe44ca2e00d29f90374a
Signed-off-by: Ignatius Michael (Jihan) Jihan <quic_mignatiu@quicinc.com>
The features are similar to MP03.1 RDP.
The only difference is PINE in lane 2 is replaced by WKK.
Change-Id: Ifa83c640307081e2511ab5d8728871a8344207c4
Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
This change will read the 0:ART partition for calibration data and
apply it to the appropriate registers.
Following sequence added for the same.
1. created scm_read call to read the protected register.
2. added function to read data from ART partition of all flash types
3. added function to apply data to the Caldata register.
Change-Id: I4c769be3cdf664e4c59159851cc211fca53c0f27
Signed-off-by: Ignatius Michael (Jihan) Jihan <quic_mignatiu@quicinc.com>
Add failsafe boot support to recover from system hang.
Signed-off-by: anusha <anusharao@codeaurora.org>
Change-Id: I49e28a4e88aa16e564065d06f8701dc4f6cb3555
Currently, during secure authentication only return values are checked,
error codes are not considered. So, added respective check to verify both
return value and error codes value during secure_authentication scm call.
Change-Id: Ie3e4fbf8651666001bdfacc0705fb2799a306b96
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This patch optimizes and updates the EDMA Driver as
required for ipq9574 platform similar to the Kernel
Host EDMA Driver.
-> Config TX_MOD and RX_MOD timers
-> Config DMAR_CTRL
-> Config Service code bypass for TX_DESC
-> Update the SRCINFO and DST_PORT configs
-> Make changes to include secondary and primary DESC's
into the same corresponding ring structure
-> Increase the TX_BUFF Size to 2048
-> Update to use RX_DESC RING 23
-> Remove unused fields from the EDMA structures
-> Update the description for the EDMA structure fields
Change-Id: I3f7f1c11cdd87687c38774a4930c9bee90857203
Signed-off-by: Selvam Sathappan Periakaruppan <quic_speriaka@quicinc.com>
The command dpr_execute <load_address_of_dpr_binary>
is defined for the user to initiate DPR processing.
Uboot will raise scm call to TZ and pass the DPR load address.
Change-Id: Ide4495b49485a4ac6b722f0cb7d423d6a93946ca
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Added read & write bam pipe entires in all the ipq specific dtsi.
Also, updated the spi bam code with generic code changes to enable
the multiple spi support on all ipq chipsets.
Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
Signed-off-by: Ram Kumar D <ramd@codeaurora.org>
Change-Id: Ibcdb9d2a9ff7a25f3d296ecdb1aca403511e07d7
The main differece on AL02-C4 are,
PCIE1: 2G WKK
PCIE2: 6G WKK
PCIE3: 5G WKK
Other features are same as AL02-C1.
Change-Id: Ie13154dacf247c99e15f1da775238012075740ee
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
When a long string (>255 char) input given to uboot console, RX
stale timeout occurred on UART subsystem due to RXFULL. This in-turn
cause uboot console to stuck.
So, Added a check to catch this scenario and re-start the UART RX
if it occurred.
Change-Id: Ic80c1d5f1178bf2455385c3888a2023ce1dbf6fa
Signed-off-by: Ram Kumar D <ramd@codeaurora.org>
The main differece on AL02-C3 are,
PCIE0: 1x5G
PCIE2: 1x6G
PCIE3: SDX
Other features are same as AL02-C2
Change-Id: If40e554baf16af1654bef3314f017f93d2babfbb
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com>
Include SCM call to inform TZ whether HLOS boots from
primary or secondary partition
Change-Id: Ib1fa2b3c12762d1deed5b99f025c83870c142fa6
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
Updated the source from gpll0_out_aux to gpll0_out_main
Change-Id: Iecaefbe03c02286823d1a67ea53b180bfd8d948e
Signed-off-by: anusha <anusharao@codeaurora.org>
Only i2c aliases will be populated as needed in respective
RDP DTS. All i2c nodes will be added in common SOC DTS.
Change-Id: I540425c63339f45990231dca84cab6e66af009fb
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Only 2 PCIE's must be enabled by default in AL02.
Change-Id: I6ef06daca92e83df065bb4ca80d77e79b13834e5
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
This change allign pci id with design.
This changes remove the manual id variable and use
alias id number instead.
Change-Id: I7ba481ee6e05b58a8481ccd89c6d40c4b3928e76
Signed-off-by: Vandhiadevan Karunamoorthy <vkarunam@codeaurora.org>
In ipq9574, switch_mac_mode0 is used for Uniphy0 and
this patch updates the same for db-al02 RDP.
Change-Id: I23080d70f9462bf857e083d6f54a97e8ce20d341
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
In c3 config, we will be making the following changes:
DB-AL01-c3:
Removing 1x2.5G port & adding 1x10G in USXGMII1 with rework
DB-AL02-c3:
Removing 1x2.5G port & adding 1xSFP+ in USXGMII0 with Rework
Note that other features are same as c1 in c3 config and
Ethernet port changes will be done on top of this.
Change-Id: I4ccfcf196e923a815deea377879cdc3e782d4673
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
These properties are not used in UBoot and this patch
removes the same.
Change-Id: I949f207d5b772755e6ab818270cd6c401e8e8f8a
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
