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https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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ipq806x: Disable relocation in uboot-2016
This change will resolve the "L2 Master port decode error" print in the Kernel log. Change-Id: I12fd39a85093cc1d7fab336898e039a61eeb5565 Signed-off-by: sameeruddin shaik <samesh@codeaurora.org>
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df527e6248
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f2741fbe5a
7 changed files with 20 additions and 8 deletions
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@ -240,6 +240,8 @@ enum dcache_option {
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DCACHE_WRITETHROUGH = DCACHE_OFF | TTB_SECT_C_MASK,
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DCACHE_WRITEBACK = DCACHE_WRITETHROUGH | TTB_SECT_B_MASK,
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DCACHE_WRITEALLOC = DCACHE_WRITEBACK | TTB_SECT_TEX(1),
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SHARED_DEVICE = TTB_SECT_B_MASK | TTB_SECT_S_MASK | TTB_SECT_DOMAIN(0) |
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TTB_SECT_XN_MASK | TTB_SECT,
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};
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#else
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/* options available for data cache on each page */
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@ -248,6 +250,10 @@ enum dcache_option {
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DCACHE_WRITETHROUGH = 0x1a,
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DCACHE_WRITEBACK = 0x1e,
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DCACHE_WRITEALLOC = 0x16,
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/* Regions other than DDR has to be marked as "shared device"
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* They have B bit set, C bit unset, S(hared) bit set, XN bit set
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*/
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SHARED_DEVICE = 0x10016,
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};
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#endif
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@ -62,7 +62,7 @@ void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
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mmu_page_table_flush((u32)&page_table[start], (u32)&page_table[end]);
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}
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#if defined(CONFIG_ARCH_IPQ40xx) || defined(CONFIG_ARCH_IPQ807x) || defined(CONFIG_ARCH_IPQ6018)
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#if defined(CONFIG_IPQ_NO_RELOC)
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#define UBOOT_CACHE_SETUP 0x100e
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#define GEN_CACHE_SETUP 0x101e
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@ -90,9 +90,10 @@ void mmu_setup(void)
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u32 reg;
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arm_init_before_mmu();
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memset(gd->arch.tlb_addr, 0, gd->arch.tlb_size);
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/* Set up an identity-mapping for all 4GB, rw for everyone */
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for (i = 0; i < 4096; i++)
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set_section_dcache(i, DCACHE_WRITEALLOC);
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set_section_dcache(i, SHARED_DEVICE);
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for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
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dram_bank_mmu_setup(i);
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@ -86,7 +86,7 @@ ENTRY(_main)
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bl board_init_f_mem
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mov sp, r0
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#if defined(CONFIG_ARCH_IPQ807x) || defined(CONFIG_ARCH_IPQ40xx) || defined(CONFIG_ARCH_IPQ6018)
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#if defined(CONFIG_IPQ_NO_RELOC) || defined(CONFIG_ARCH_IPQ6018)
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ldr r0, =__bss_start /* this is auto-relocated! */
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#ifdef CONFIG_USE_ARCH_MEMSET
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@ -156,7 +156,7 @@ here:
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cmp r0, #0
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movne sp, r0
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# endif
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#if !defined(CONFIG_ARCH_IPQ807x) && !defined(CONFIG_ARCH_IPQ40xx) && !defined(CONFIG_ARCH_IPQ6018)
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#if !defined(CONFIG_IPQ_NO_RELOC) && !defined(CONFIG_ARCH_IPQ6018)
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ldr r0, =__bss_start /* this is auto-relocated! */
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#ifdef CONFIG_USE_ARCH_MEMSET
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@ -1062,7 +1062,7 @@ void board_init_f(ulong boot_flags)
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gd->flags = boot_flags;
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gd->have_console = 0;
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#if defined(CONFIG_ARCH_IPQ807x) || defined(CONFIG_ARCH_IPQ40xx) || defined(CONFIG_ARCH_IPQ6018)
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#if defined(CONFIG_IPQ_NO_RELOC)
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gd->flags |= GD_FLG_SKIP_RELOC;
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#endif
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@ -25,6 +25,7 @@
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#endif
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#define CONFIG_IPQ40XX
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#define CONFIG_IPQ_NO_RELOC
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_CACHELINE_SIZE 64
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@ -34,6 +34,7 @@
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#endif /* !DO_DEPS_ONLY */
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#define CONFIG_IPQ806X
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#define CONFIG_IPQ_NO_RELOC
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#define CONFIG_SMP_CMD_SUPPORT
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#ifdef CONFIG_SMP_CMD_SUPPORT
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#define NR_CPUS 2
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@ -43,7 +44,7 @@
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#define CONFIG_SYS_CACHELINE_SIZE 64
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#define CONFIG_IPQ806X_ENV
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#define CONFIG_SYS_BOOTM_LEN (64 << 20)
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#define CONFIG_IPQ_FDT_HIGH 0x48000000
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#define CONFIG_IPQ_FDT_HIGH 0xffffffff
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#define CONFIG_BOOTARGS "console=ttyMSM0,115200n8"
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_VSNPRINTF
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@ -132,7 +133,7 @@
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sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define CONFIG_SYS_TEXT_BASE 0x41200000
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#define CONFIG_SYS_TEXT_BASE 0x42000000
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#define CONFIG_SYS_SDRAM_SIZE 0x10000000
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#define CONFIG_MAX_RAM_BANK_SIZE CONFIG_SYS_SDRAM_SIZE
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + (64 << 20))
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@ -244,7 +245,9 @@ typedef struct {
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#define IPQ_TEMP_DUMP_ADDR (IPQ_MEM_RESERVE_BASE(nsstcmdump))
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#define IPQ_TFTP_MIN_ADDR (CONFIG_SYS_SDRAM_BASE + (32 << 20))
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#define IPQ_TFTP_MAX_ADDR (gd->start_addr_sp - (4 << 20))
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#define IPQ_TFTP_MAX_ADDR (gd->bd->bi_dram[0].start + \
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gd->bd->bi_dram[0].size)
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#define CONFIG_QCA_SMEM_BASE CONFIG_SYS_SDRAM_BASE + 0x1000000
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#endif /* __ASSEMBLY__ */
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@ -29,6 +29,7 @@
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*/
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_IPQ_NO_RELOC
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#define CONFIG_BOARD_LATE_INIT
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_CACHELINE_SIZE 64
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