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Merge "Revert "Revert "qca: cache: Enabled dcache on board initialization"""

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Linux Build Service Account 2018-06-03 23:09:55 -07:00 • committed by Gerrit - the friendly Code Review server
commit a23ced2e22
3 changed files with 17 additions and 0 deletions
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5
board/qca/arm/common/cmd_runmulticore.c
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@ -69,6 +69,8 @@ int do_runmulticore(cmd_tbl_t *cmdtp,
if ((argc <= 1) || (argc > 4))
return CMD_RET_USAGE;
dcache_disable();
/* Setting up stack for secondary cores */
memset(core, 0, sizeof(core));
@ -167,6 +169,9 @@ int do_runmulticore(cmd_tbl_t *cmdtp,
free(core[i - 1].stack_top_ptr);
}
invalidate_dcache_all();
dcache_enable();
return CMD_RET_SUCCESS;
}

11
board/qca/arm/ipq807x/ipq807x.c
View file

@ -1003,12 +1003,23 @@ void set_flash_secondary_type(qca_smem_flash_info_t *smem)
void enable_caches(void)
{
qca_smem_flash_info_t *sfi = &qca_smem_flash_info;
smem_get_boot_flash(&sfi->flash_type,
&sfi->flash_index,
&sfi->flash_chip_select,
&sfi->flash_block_size,
&sfi->flash_density);
icache_enable();
/*Skips dcache_enable during JTAG recovery */
if (sfi->flash_type)
dcache_enable();
}
void disable_caches(void)
{
icache_disable();
dcache_disable();
}
/*

1
include/configs/ipq807x.h
View file

@ -328,6 +328,7 @@ extern loff_t board_env_size;
* Cache flush and invalidation based on L1 cache, so the cache line
* size is configured to 64 */
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_CMD_CACHE
/* Enabling this flag will report any L2 errors.
* By default we are disabling it */