diff --git a/board/qca/arm/common/cmd_runmulticore.c b/board/qca/arm/common/cmd_runmulticore.c
index ef19ea4217..bb9abe3147 100644
--- a/board/qca/arm/common/cmd_runmulticore.c
+++ b/board/qca/arm/common/cmd_runmulticore.c
@@ -69,6 +69,8 @@ int do_runmulticore(cmd_tbl_t *cmdtp,
 	if ((argc <= 1) || (argc > 4))
 		return CMD_RET_USAGE;
 
+	dcache_disable();
+
 	/* Setting up stack for secondary cores */
 	memset(core, 0, sizeof(core));
 
@@ -167,6 +169,9 @@ int do_runmulticore(cmd_tbl_t *cmdtp,
 		free(core[i - 1].stack_top_ptr);
 	}
 
+	invalidate_dcache_all();
+	dcache_enable();
+
 	return CMD_RET_SUCCESS;
 }
 
diff --git a/board/qca/arm/ipq807x/ipq807x.c b/board/qca/arm/ipq807x/ipq807x.c
index f7e9b76af0..a6e669155c 100644
--- a/board/qca/arm/ipq807x/ipq807x.c
+++ b/board/qca/arm/ipq807x/ipq807x.c
@@ -1003,12 +1003,23 @@ void set_flash_secondary_type(qca_smem_flash_info_t *smem)
 
 void enable_caches(void)
 {
+	qca_smem_flash_info_t *sfi = &qca_smem_flash_info;
+
+	smem_get_boot_flash(&sfi->flash_type,
+			    &sfi->flash_index,
+			    &sfi->flash_chip_select,
+			    &sfi->flash_block_size,
+			    &sfi->flash_density);
 	icache_enable();
+	/*Skips dcache_enable during JTAG recovery */
+	if (sfi->flash_type)
+		dcache_enable();
 }
 
 void disable_caches(void)
 {
 	icache_disable();
+	dcache_disable();
 }
 
 /*
diff --git a/include/configs/ipq807x.h b/include/configs/ipq807x.h
index dcb10d77af..ed6d3e5c02 100644
--- a/include/configs/ipq807x.h
+++ b/include/configs/ipq807x.h
@@ -328,6 +328,7 @@ extern loff_t board_env_size;
  * Cache flush and invalidation based on L1 cache, so the cache line
  * size is configured to 64 */
 #define CONFIG_SYS_CACHELINE_SIZE  64
+#define CONFIG_CMD_CACHE
 
 /* Enabling this flag will report any L2 errors.
  * By default we are disabling it */