From 4cf0b0294a49f9e5f555e95412dade461fed6139 Mon Sep 17 00:00:00 2001
From: Vasudevan Murugesan <vmuruges@codeaurora.org>
Date: Thu, 21 Apr 2016 19:44:02 +0530
Subject: [PATCH] ipq807x: Enabled spi-nor flash support

Change-Id: Id3b876e9d3c00268e608a2fcb76a30a38d965e48
Signed-off-by: Vasudevan Murugesan <vmuruges@codeaurora.org>
---
 drivers/mtd/spi/sf_params.c |  8 ++++++++
 include/configs/ipq807x.h   | 20 ++++++++++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 766722e024..ac8cd8b264 100644
--- a/drivers/mtd/spi/sf_params.c
+++ b/drivers/mtd/spi/sf_params.c
@@ -96,7 +96,11 @@ const struct spi_flash_params spi_flash_params_table[] = {
 	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256, RD_FULL,		     WR_QPP},
 	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512, RD_FULL,	   WR_QPP | SECT_4K},
 	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512, RD_FULL,	   WR_QPP | SECT_4K},
+#ifdef CONFIG_IPQ_RUMI
+	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  8192, RD_NORM,                  SECT_4K},
+#else
 	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
+#endif
 	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
 	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
 	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
@@ -126,7 +130,11 @@ const struct spi_flash_params spi_flash_params_table[] = {
 	{"W25Q16CL",	   0xef4015, 0x0,	64 * 1024,    32, RD_FULL,	    WR_QPP | SECT_4K},
 	{"W25Q32BV",	   0xef4016, 0x0,	64 * 1024,    64, RD_FULL,	    WR_QPP | SECT_4K},
 	{"W25Q64CV",	   0xef4017, 0x0,	64 * 1024,   128, RD_FULL,	    WR_QPP | SECT_4K},
+#ifdef CONFIG_IPQ_RUMI
+	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256, RD_NORM,	             SECT_4K},
+#else
 	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256, RD_FULL,	    WR_QPP | SECT_4K},
+#endif
 	{"W25Q256",	   0xef4019, 0x0,	64 * 1024,   512, RD_FULL,	    WR_QPP | SECT_4K},
 	{"W25Q80BW",	   0xef5014, 0x0,	64 * 1024,    16, RD_FULL,	    WR_QPP | SECT_4K},
 	{"W25Q16DW",	   0xef6015, 0x0,	64 * 1024,    32, RD_FULL,	    WR_QPP | SECT_4K},
diff --git a/include/configs/ipq807x.h b/include/configs/ipq807x.h
index 6c8f29ffb5..c50271ca6c 100644
--- a/include/configs/ipq807x.h
+++ b/include/configs/ipq807x.h
@@ -18,6 +18,11 @@
 #include <generated/asm-offsets.h>
 #endif
 
+/*
+ * Support for IPQ807X RUMI
+ */
+#define CONFIG_IPQ_RUMI
+
 /*
  * Disabled for actual chip.
  * #define CONFIG_RUMI
@@ -79,6 +84,21 @@
 #define CONFIG_MAX_RAM_BANK_SIZE        CONFIG_SYS_SDRAM_SIZE
 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + (64 << 20))
 
+/*
+* SPI Flash Configs
+*/
+#define CONFIG_QCA_SPI
+#define CONFIG_SPI_FLASH
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_WINBOND
+#define CONFIG_SPI_FLASH_MACRONIX
+#define CONFIG_SPI_FLASH_GIGADEVICE
+#define CONFIG_SF_DEFAULT_BUS	0
+#define CONFIG_SF_DEFAULT_CS	0
+#define CONFIG_SF_DEFAULT_MODE	SPI_MODE_0
+#define CONFIG_SPI_FLASH_BAR	1
+
 /*
  * U-Boot Env Configs
  */