The comment at the end of the 'ar9340_initvals.h'
header does not match with defined constant. Fix it.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
The initvals tool contain support for the
AR9565 chip, however the sha1sum values and
the actual initval arrays are not printend
when 'initvals' is called without a family
parameter.
Add the missing 'ar9565_1p0_hw_print_initvals()'
calls to fix this. Also refresh checksums.txt.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
The 'ar9331_common_rx_gain_1p2' array was a dupe
of 'ar9485_common_rx_gain_1_1'. Since commit
8a72181377 (Update
AR9485 initvals) this is no longer the case.
Because the SHA1 values of the two arrays are
different now, verify_checksum.sh complains:
$./verify_checksums.sh
ar5008 7340125997ffffe26a3bfc854c5b9dce74b86152 pass
ar9001 8a4557f6a4e5ad2b01a40ca0519940ab775572aa pass
ar9002 67813ac6decf14f5221dd3c41126f23f4d333fc4 pass
ar9003-2p2 fdcc27a4327c6bb5e82bc7ded7387e06a2c82bb0 pass
ar9330-1p1 e01b965b87c98d865b43e5febf37cb067644e56b pass
ar9330-1p2 ab7e2aa014d2a9bd5cefad261999868888fc570e fail
+1d9e632b3fdcb2db52f95dd75ff2eac31fcac0d6 ar9331_common_rx_gain_1p2
ar9485 bbe34977a5de7a913333149ff322e767b53ec9e3 pass
ar9580-1p0 cbdf2a5efad22be6694b586f8bd9c6605697cb9f pass
$
Use the INI_PRINT macro for the 'ar9331_common_rx_gain_1p2'
array and refresh the 'ar9330_1p2_initvals.h' header.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
The initvals of the AR9462 and AR9485 chips
has been updated recently, but checksums.txt
does not reflects that. Refresh it in order to
contain the actual sha1sum values.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Add support to dump base and modal eeprom header of AR9003 family
chips.
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Enable hw PLL power save to reduce power consumption in sleep state
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
* update dac_async_fifo
* use peak detection for 5GHz
* Fix wrong peak detector DC offset
Signed-off-by: Rajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Sync with the latest INI from systems and fix the version.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
* Set BB_tpc_1.enable_pd_calibrate to 0
* Set BB_cl_cal_ctrl.enable_parallel_cal to 1
* Enable "enable_dac_async_fifo" and "enable_adc_async_fifo"
to fix some dac/adc timing issue,
e.g. EVM won't degrade when setting core voltage to 1.15V.
Set BB_gen_controls.enable_dac_async_fifo=1
Set BB_gen_controls.enable_adc_async_fifo=1
* Improve LNA2 Sensitivity ~1dB
Set ch0_PLLCLKMODA2WLAN.inv_clk320_adc_ch0 = 1
* Correct alternate chain RSSI when doing diversity
Set BB_bbb_sig_detect.ant_switch_time to 63
* Refer to RACK RX gain report and modify RF gain table for LNA2
* Invert the phase of the root of both clocks
(setting flip_pllclk320 = 1) and set inv_clk320_adc back = 0.
Set ch0_PLLCLKMODA2WLAN.flip_pllclk320 to 1
Set ch0_PLLCLKMODA2WLAN.inv_clk320_adc_ch0 to 0
* Remove MAC PCU registers MAC_PCU_TSF_L32/MAC_PCU_TSF_U32.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
This adds the code used to do the final work for the Atheros HAL regulatory
dump to a CRDA db.txt. The Atheros HAL regulatory code was the only source
of information we had at that time for regulatory information.
This code is the final resulting work of the changes made to Atheros
HAL code to extract regulatory information using a new format for CRDA.
The hal-reg-dump tool was used to scrape the Atheros HAL for regulatory
informationa and extract it in a legible form.
Putting this on a public tree for historical purposes, the code itself
diverges quite a bit from what was merged on ath9k on 2.6.27 since this
code was written prior that merge effort.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
This python script can be used to read and interpret the power
rate registers for AR9003 using ath9k through debugfs. To use this you
will need applied:
0001-ath9k-Add-debugfs-interface-to-dump-registers.patch
from the crap/ directory of compat-wireless
Usage: cat /sys/kernel/debug/ath9k/phy0/regdump | read-powers
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
We are going to rename this git tree to qca-swiss-army-knife.git
and add more tools, as such lets throw the initvals work into
its own directory and allow for other tools to be thrown in here.
Lets add our own top level copyright license, and a simple README.
Signed-off-by: Luis R. Rodriguez <mcgrof@frijolero.org>
