Markus Stockhausen cbb365a77b realtek: pcs: fix PLL_CML_CTRL for serdes 0/1 ... Setup of register PLL_CML_CTRL has two issues. - It clears out bits 4-31 due to a wrong mask - Setup of bits 0-3 is not generic but depends on the mode of serdes 0/1 Fix that by relocating the code and adapting the mask. The error exists for longer but it has survived the pcs refactoring. Thus blame the corresponding refactoring commit. Fixes: b670d48 ("realtek: pcs: rtl838x: refactor imported code") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/21956 Signed-off-by: Robert Marko <robimarko@gmail.com> (cherry picked from commit fdc3776068) Link: https://github.com/openwrt/openwrt/pull/22087 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>		2026-03-01 02:02:29 +01:00
..
base-files	realtek: rtl930x: Add support for Plasma Cloud MCX3 Media Converter	2025-11-07 21:12:58 +01:00
dts	realtek: hog the GS1900-24E external IC reset line	2026-02-25 20:22:49 +01:00
files/firmware/rtl838x_phy
files-6.12	realtek: pcs: fix PLL_CML_CTRL for serdes 0/1	2026-03-01 02:02:29 +01:00
image	realtek: Cleanup tab vs spaces for indentation	2025-11-23 22:26:10 +01:00
patches-6.12	kernel: bump 6.12 to 6.12.71	2026-02-15 02:07:04 +01:00
profiles	target: use SPDX license identifiers on Makefiles	2021-02-10 15:47:18 +01:00
rtl838x	realtek: rtl930x: Disable L3 offloading	2025-10-21 21:59:28 +02:00
rtl839x	realtek: rtl930x: Disable L3 offloading	2025-10-21 21:59:28 +02:00
rtl930x	kernel: reorder configuration options	2026-01-26 23:59:37 +01:00
rtl930x_nand	kernel: reorder configuration options	2026-01-26 23:59:37 +01:00
rtl931x	realtek: rtl930x: Disable L3 offloading	2025-10-21 21:59:28 +02:00
rtl931x_nand	realtek: rtl930x: Disable L3 offloading	2025-10-21 21:59:28 +02:00
Makefile	realtek: add NAND targets for RTL93xx	2025-08-10 11:46:52 +02:00