Move resetting the CMU into the PLL configuration itself where the speed
is set. Since this operation is not dependent of the target SerDes and
only needs to be called if the speed changed, it fits better there.
Though the call was guarded with a 'speed_changed' before, this also
applies to actually changing the speed. This was done before anyway,
even if the speed value hasn't really changed.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add a mapper function to infer the to-be-selected PLL speed from the
desired SerDes hardware mode. This avoids having similar logic in each
CMU implementation.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Split up PLL configuration of RTL930x in the two distinct actions of
configuring the PLL itself (aka setting its speed, etc.) and selecting
which PLL is used by a SerDes.
It was found that for both RTL930x and RTL931x, PLL configuration can be
combined while selecting the PLL a SerDes uses differs and needs to be
implemented variant-specific.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the generic PLL type definition in the current CMU/PLL
configuration code for RTL930x. Assign explicit values to the fields of
the PLL type enum to tie these fields to the values that are used in
the register fields. This allows to simplify the code a bit.
Selecting the PLL to use for a SerDes shares some similarities between
RTL930x and RTL931x. While the location of the selector in the registers
is placed different, similar underlying bit semantics are used. This
allows to reuse the same plain values for both. RTL930x uses a force bit
and a selector bit, RTL931x at least uses the selector bit with the same
values for ring and LC PLL.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Make use of the generic PLL speed definition in the current CMU/PLL
configuration code for RTL930x. Assign explicit values to the field of
the PLL speed enum to tie these fields to the values that are used in
the register fields. This allows to simplify the code a bit.
Setting the actual speed selector for RTL930x was found to be similar to
RTL931x despite of different values being used since the LSB is always 1.
According to the SDK this seems to be a force bit while the other bits
are the actual value/selector that is being forced. For RTL930x,
separate the speed selection to be able to use that as common behavior
for both variants later.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Bring the PLL definitions into a proper shape. While there was already a
definition for the PLL type, a generic PLL speed definition was missing.
Introduce such a definition and adjust the naming of the existing PLL
type definition to have a better distinction and avoid conflicts. The
definitions can and should be used to make the CMU/PLL configuration
more generic and reduce the need for variant-specific definitions.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22198
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ethernet driver configures the SoC internal network card
on its own. There are no special serdes or other layers in
between. So there is no need for pcs handling in the driver.
Drop that.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22347
Signed-off-by: Robert Marko <robimarko@gmail.com>
These devices contain a single MAC address in the U-Boot environment.
Set it as eth0 and label MAC in device tree. To maintain the current
state, the 02_network script still sets individual port MAC addresses
and the bridge MAC address.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22302
Signed-off-by: Robert Marko <robimarko@gmail.com>
Allow to convert MAC adddresses for all devices to NVMEM in
the future.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22302
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Cudy M3000 v1/v2 seem to have mostly identical hardware.
The M3000 v1 OpenWrt images work on the M3000 v2 (excluding
the v2 parts with a different PHY). Cudy also distributes one
firmware image that supports both routers.
Rename the human-readable device variant to "v1/v2" to match this.
Don't change the compatible property as that hooks into the
attended sysupgrade process.
The recent flash and PHY changes don't seem to be related to the v1/v2
split. There exist M3000 v2 with the Realtek PHY, see e.g.
https://github.com/openwrt/openwrt/pull/21584#issuecomment-3864992555
Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22259
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The hardware is very close the the Cudy M3000 v1 (see commit
20e4a18feb). However, the Motorcomm YT8821 PHY is tricky
to support because of a MDIO address collision within the router.
Specification:
- MT7981BA CPU: dual-core ARM Cortex-A53 @ 1.3 GHz
- 256 MiB RAM
- 128 MiB SPI NAND
- Ethernet:
- 1x 1GbE LAN port driven by the internal MT7981 PHY
- 1x 2.5GbE WAN port driven by the Motorcomm YT8821
- WiFi:
- MT7981BA 2.4 GHz WiFi with 2x2:2 MIMO
- MT7981BA 5 GHz WiFi with 2x3:2 MIMO
- Buttons: Reset, WPS
- LED: 1x combined red/white
How to know if you have the a router with the YT8821 PHY:
- Boot the router into the vendor's firmware. Go to Diagnostic Tools
-> System Log. Try searching for "rtl8221b".
- If there are some matches, you have the Cudy M3000 router with
the Realtek PHY and you should NOT use the device defined in this
commit. Instead, you should use the device defined in
mt7981b-cudy-m3000-v1.dts.
- If there are no matches, try searching for "yt8821". If that
matches something, you have the Cudy M3000 with the Motorcomm PHY
and you should use this device tree
(mt7981b-cudy-m3000-v2-yt8821.dts).
- If even the yt8821 string did not match anything, then something
is wrong. Rebooting the router might help (the system log would
be refreshed).
Installation via the Cudy web UI:
- Download the signed intermediary firmware from
https://drive.google.com/drive/folders/1BKVarlwlNxf7uJUtRhuMGUqeCa5KpMnj
- Flash the intermediary firmware using the Cudy web UI
- Connect a PC/laptop to the "1Gbps LAN" port
- Open http://192.168.1.1 in your browser, log in
(the password should be empty)
- Flash your desired OpenWrt firmware via LuCI
- The router should reboot into the desired firmware
How to access UART (citing from 20e4a18feb):
- remove rubber ring on the bottom
- remove screws
- pull up the cylinder, maybe help by push on an ethernet socket
with a screwdriver
- remove the (3) screws holding the board in the frame
- remove the board from the frame to get to the screws for the
silver, flat heat shield
- remove the (3) screws holding the heat shield
- solder UART pins to the back of the board
- make sure to have the pins point out on side with the black,
finned heat spread
- the markings for the pins are going to be below the silver heat
shield
- Vcc is not needed
- the UART parameters are 115200 baud, 8n1
Installation via UART (citing from 20e4a18feb):
- attach an Ethernet cable to the "1Gbps LAN" port on the router
- hold the reset button while powering the router
- press CTRL-C or wait for the timeout to get to the U-Boot prompt
- prepare a TFTP server on the network to supply ..-initramfs-kernel.bin
- use 'tftpboot 0x46000000 ..-initramfs-kernel.bin' in the U-Boot
shell to pull the image (change the file name accordingly)
- boot the image using 'bootm 0x46000000'
- push the ..-sysupgrade to the router using your preferred method
- perform the upgrade with 'sysupgrade -n'
Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22259
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The KSZ9477 driver was added to the cortexa53 kernel to support the
Gateworks Venice product family which has a board with this switch. Now
that the kmod-dsa-ksz9477 driver is available as a package remove the
static configuration ad add the package.
This resolves an issue caused by having the switch driver static and the
PHY driver as a module such that the PHY driver was not registered early
enough to be used causing some errata to not be worked around.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Link: https://github.com/openwrt/openwrt/pull/22120
Link: https://github.com/openwrt/openwrt/pull/22257
Signed-off-by: Robert Marko <robimarko@gmail.com>
In generic, there's a backport from 6.14 that makes this change. Do so
in downstream locations as well.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21167
Signed-off-by: Robert Marko <robimarko@gmail.com>
Restore the lost band label.
Fixes: 502ac21e8f ("ipq40xx: drop redundant label with new LED color/function format")
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
SFP I2C buses for ports 1 and 3 were swapped as order changed on production
boards.
So, swap them around to fix SFP 1 and 3 failed to read EEPROM errors.
Fixes: 29b3d929a6 ("microchipsw: lan969x: add Novarq Tactical 1000")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
I wrongly added the wifi devices to the pcie nodes and not the bridge
nodes as they were not present at the time.
Fixes: 58056df ("bcm53xx: backport nvmem mac for meraki mr26")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22369
Signed-off-by: Robert Marko <robimarko@gmail.com>
Remove source-only from an7581.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Most, if not all Airoha devices will have LEDs and buttons. Add them to
default packages.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add uboot-envtools to default packages to facilitate modifying the
u-boot environment.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit adds support for Gemtek (Centurylink/Lumen/Quantum Fiber)
W1700K.
Device specification
--------------------
SoC Type: Airoha AN7581
RAM: ESMT M16U8G16512A (2GB)
Flash: Winbond 25N04KVZEIR (512MB)
Ethernet: 2x gigabit via AN7581, 2x 10g via RTL8261N
Wi-Fi: MT7996 - BE19000
LEDs: 1 LED, power/status
Button: Reset
USB ports: None
Bootloader: U-Boot 2014.04-rc1 (Jun 12 2024 - 08:14:34) AXON 2.0
Fan: 1x controlled by Nuvoton NCT7511Y
This device is pretty useless with the stock firmware as it requires an
account to completely set it up. Additionally, the vendor bootloader is
signed and uses Airoha/Mediatek's BBT/BMT for bad block management on
the flash. It does not support UBI, thus kernel updates are subject to
BMT/BBT which OpenWrt does not support. In turn, if a kernel update
happens and a block is marked bad in the process, the device will fail
to boot and will need to be recovered via serial.
The workaround is to chainload U-Boot in place of the kernel, as it
should not need frequent updates and thus should not cause BBT/BMT to
misbehave and soft-brick the device. Upstream U-Boot supports loading
a FIT image from UBI, so we create a UBI partition for the new u-boot
env, FIT image and factory data. This way, bad blocks are managed by UBI
instead, which will not soft-brick the device should a block be marked
bad during a normal OpenWrt update. Users wishing to update U-Boot can
do so, but should be prepared to recover if a block goes bad.
Because the device is not useful with stock firmware, this is a one-way
ticket for most users and reverting will not be documented.
The following steps can be used to install OpenWrt on the W1700K.
Connect to serial console. There is a Torx T10 screw underneath the QR
code printed onto the label. Then, pry between the gray and white
plastic, starting by the ports on the back. There are clips arount the
entire device. Starting closest to the screw next to the UART header,
TX - GND - VCC - N/A - RX. The bootloader can be interrupted by
pressing any key.
Configuring Vendor Bootloader and Installing U-Boot Chainloader:
The bootloader's default bootcmd will only run a signed image. However,
we can still bootm our own image from flash.
NOTE: The vendor's ethernet drivers are flaky. You may have to reboot
and try the tftpboot part several times for it to work.
- setenv one flash read 0x600000 0x1000000 \$loadaddr
- setenv two "; bootm"
- setenv bootcmd "$one$two"
- setenv one
- setenv two
- saveenv
- setenv serverip 192.168.1.10; setenv ipaddr 192.168.1.1; tftpboot
0x89000000 openwrt-airoha-an7581-gemtek_w1700k-ubi-chainload-uboot.itb
- flash erase 0x600000 0x100000
- flash write 0x600000 0x100000 0x89000000
- reset
The device will now reboot into the U-Boot chainloader.
Loading the W1700K UBI Installer:
The installer can be downloaded at
https://github.com/hurrian/w1700k-ubi-installer/releases
- Boot the installer via the TFTP option in the U-Boot menu. This
process is automatic, though you may be prompted to answer some
questions.
- Once it is done, you may upgrade to your preferred build.
- For more information: https://github.com/hurrian/w1700k-ubi-installer
For those wishing to explore the stock firmware:
Rooting Stock FW (for making backups, recommended):
- Boot the router and watch serial console until presented with failsafe
mode. Enter it (f + enter).
- mount_root
- Change the root password (passwd).
- Open /etc/config/axon_platform_manager and set sshServerEnable,
localAccessEnable and remoteAccessEnable to 1.
- Search for "SSH". You'll find a long string with 3 matches such as
Enabled%25252c1%25252cSSH%Drop. Change any instances of "Disabled"
preceding SSH to "Enabled" and any instances of "Drop" to "Accept"
that follow SSH. Same for "Local SSH" and "Remote SSH".
- Set /etc/config/dropbear to:
config dropbear
option PasswordAuth 'on'
option RootPasswordAuth 'on'
option Port '22'
- Reboot.
- Connect 10g WAN port to existing network and SSH in with the password
you set.
- SSH into rooted stock fw.
Signed-off-by: Andrew LaMarche <andrewjlamarche@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17869
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
In the transition to nvmem-layout and subsequent disabling of non layout
u-boot-env, this device was left out.
Transition to nvmem-layout to fix the mac address.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Userspace handling is deprecated.
These are identical to NBG6617, which was tested as working.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Userspace handling is deprecated.
UBI nvmwem has been supported for quite a while now.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22263
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
When NVMEM is not ready, of_get_mac_address fails. Handle this.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22305
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
When NVMEM is not ready, of_get_mac_address fails. Handle this.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22305
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
RTL838x devices cannot reboot if the flash controller is driven in
4 byte mode. Unitl fdc3776 ("realtek: pcs: fix PLL_CML_CTRL for
serdes 0/1") this bit was luckily cleared by a coding error. Since
then the device cannot be rebooted anymore.
Looking at the SDK one can see that this bit is reset short before
the reboot happens. But we might need that in critical situations
where there is no chance to do it right in time. As the RTL838x
always ran with the bit disabled restore the old behaviour. This
time implement it as a documented quirk so it does not get lost.
Fixes: fdc3776 ("realtek: pcs: fix PLL_CML_CTRL for serdes 0/1")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22334
Signed-off-by: Robert Marko <robimarko@gmail.com>
Disable airoha-flow-stats for an7583 since it is not currently supported
by the firmware image.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://github.com/openwrt/openwrt/pull/22341
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The Realtek DSA driver accesses the DTS at two locations.
- rtldsa_ethernet_loaded(): to check if ethernet driver is active
- rtl83xx_mdio_probe(): to create ports and link to pcs/phy
The first function does not directly search for the ethernet driver
but looks it up through the switch port nodes. Avoid future issues
and simply search all nodes that have a "ethernet" link to the
network driver.
While we are here add a missing put_device() to keep reference
counters clean.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22235
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rteth_930x_create_tx_header() and rteth_931x_create_tx_header() do
basically the same. Only exception is, that one function can handle
ports beyond 32 and the other not. Merge them into one.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22228
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
MAC setting uses hard to read duplicated code. Additionally it
evaluates the unwanted family_id attribute. Provide the list
of MAC address registers in the configuration structure and use
a loop to fill those.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22217
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is a workaround in the transmit path for the RTL838x SoCs. This
is basically an open coded read_poll_timeout() and makes the code hard
to read. Additionally the magic trigger calculation is not easy to
understand.
Simplify things by using kernel standards and a better macro.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/22217
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Some 10G optics showed random "module transmit fault indicated" due to I2C
read errors on ONTi ONT-S508CL-8S/XikeStor SKS8300-8X switches. The same
modules work with the original firmware and on other Linux based devices.
There seems to be some differences in how we talk to those modules using
I2C in OpenWRT. To fix this this patch adds support for 50kHz I2C speed on
SFPs and enables that for XikeStor/Onti devices. Since SFPs only transmit
very few bytes this should not have any real downsides.
This patch adds support in the i2c driver for 50kHz and 2.5MHz. In a
second PR I will configure 50kHz in the DTS for the affected devices.
Signed-off-by: Jan Kantert <jan-openwrt@kantert.net>
Link: https://github.com/openwrt/openwrt/pull/22209
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
LACP frequently changes active/backup links. driver must also handle
dp->lag_tx_enabled.
This should only affect egress LAG table, ingress should not be touched.
To test, connect a known working 802.3ad compatible switch (Mikrotik).
Configure bond with 802.3ad on openwrt as well as mikrotik.
Observer active/backup links on openwrt with
```
for iface in <list of bond participants>; do
ip -d link show $iface
done
```
This should show ACTIVE/BACKUP status which must be synchronized with
the partner's ACTIVE/BACKUP status if LACP is working correctly.
Backup interface must not be chosen by the distribution algorithm to
transmit egress packet
At the moment, we have two parties involved in the selection of active LAG TX
ports:
- the bonding/DSA code which informs about activated/deactivated ports using
.port_lag_change
- the HW which is deactivating ports based on the link state see
RTL93XX_TRK_CTRL_LINK_DOWN_AVOID
In our case, the software is supposed to manage everything
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
With this commit it is possible to create 802.3ad compatible bond
interface that is interoperable with other 802.3ad compatible switches.
Each trunk group can have maximum of 8 ports as members.
Hardware also supports trunking with stacked switches, however it is not
handled here and the driver only configures the local trunk.
rtl930x and rtl931x has minimal differences in trunk/lag
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl93xx has two distribution algorithm slots that are shared among
multiple trunks.
Each of this slot can be configured to handle L2 and/or L3 packets
Hardware can also be configured to support layer3+4 but that is not
802.3ad compliant. With this commmit I want to focus on getting
layer2 and layer2+3 initialized in two slots.
When a new LAG group is created, depending on the xmit_hash_policy
configuration a slot will be configured in LAG table entry
SPA and VLAN bits made the switch to always choose same link for all
connections which completely dismisses point of Link aggregation.
So avoid these and stick to SMAC + DMAC for L2 packets and
SMAC + DMAC + SIP + DIP for L3 packets
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Jan Fuchs <jf@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl93xx hardware supports trunk fdb entries. That requires driver to
translate port-fdb entry to trunk fdb entry if the port is part of a
LAG.
There is no standard way of indicating fdb entries for bond interfaces.
One can use debugfs interface l2_table to dump all the entries stored in
the hardware. Trunk FDB entries are now displayed properly with trunk ID
and participating ports
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
rtl9310 and rtl9300 have two slots for configuration of packet distribution
algorithm that can be assigned to multiple LAG groups. They also have the
same field descriptions
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It is not helpful at the moment to expose all the SoC specific details to
the common code when it actually only needed to add ports to a LAG. Just
have a simple interface for now.
Support returning errors while setting distribution algorithm
Move setting algomask to rtl83xx specific routine and out of common lag_add
because algomasks will be handled differently on rtl93xx
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/21740
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware
========
SoC: Qualcomm IPQ4018
ETH: Qualcomm QCA8075 (2 x RJ-45)
WDG: OnSemi SCT706
RAM: Micron MT41K128M16JT-125 (256MB)
NOR: Infineon S25FL512S (64MB)
Installation
============
1. Create a ramboot-able image with the command
{ dd if=/dev/zero bs=32 count=1 2>/dev/null; \
cat openwrt-ipq40xx-generic-huawei_ap4050dn-initramfs-uImage.itb; \
} > ramboot.bin`
2. Start a TFTP server in the folder with the ramboot.bin.
3. Plug in a USB-RJ45 serial adapter to the CONSOLE port of the device
and start a serial console session with
9600 baud, no parity, 1 stop bit.
4. Plug in either 12V power or PoE to the device.
5. On the prompt `Press f or F to stop Auto-Boot in 3 seconds`,
press `f` to enter the Huawei U-Boot command line
6. Enter a new password for the u-boot command line
7. In the command line, run these commands to ramboot OpenWrt:
setenv serverip <IPv4 address of TFTP server>
setenv ipaddr <IPv4 address for this AP>
setenv rambootfile ramboot.bin
run ramboot
8. In OpenWrt, set up the network and then `scp` the files
`u-boot-huawei_ap4050dn/uImage` and
`openwrt-ipq40xx-generic-huawei_ap4050dn-squashfs-sysupgrade.bin`
into `/tmp/`
9. To backup the original firmware, run the following:
cat /dev/mtd12 /dev/mtd13 > huawei_ap4050dn_fw_backup.bin.bin
10. Run the following commands to flash u-boot and OpenWrt to the device:
mtd erase uboot
mtd write /tmp/uImage uboot
sysupgrade -n /tmp/openwrt-ipq40xx-generic-huawei_ap4050dn-squashfs-sysupgrade.bin
11. The device should now boot OpenWrt! (sometimes the boot process takes a bit
longer due to the watchdog resetting the device before the watchdog driver runs)
Signed-off-by: Marco von Rosenberg <marcovr@selfnet.de>
