mediatek: filogic: add support for Cudy M3000 w/ YT8821 PHY

The hardware is very close the the Cudy M3000 v1 (see commit
20e4a18feb). However, the Motorcomm YT8821 PHY is tricky
to support because of a MDIO address collision within the router.

Specification:
 - MT7981BA CPU: dual-core ARM Cortex-A53 @ 1.3 GHz
 - 256 MiB RAM
 - 128 MiB SPI NAND
 - Ethernet:
   - 1x 1GbE LAN port driven by the internal MT7981 PHY
   - 1x 2.5GbE WAN port driven by the Motorcomm YT8821
 - WiFi:
   - MT7981BA 2.4 GHz WiFi with 2x2:2 MIMO
   - MT7981BA 5 GHz WiFi with 2x3:2 MIMO
 - Buttons: Reset, WPS
 - LED: 1x combined red/white

How to know if you have the a router with the YT8821 PHY:
 - Boot the router into the vendor's firmware. Go to Diagnostic Tools
   -> System Log. Try searching for "rtl8221b".
 - If there are some matches, you have the Cudy M3000 router with
   the Realtek PHY and you should NOT use the device defined in this
   commit. Instead, you should use the device defined in
   mt7981b-cudy-m3000-v1.dts.
 - If there are no matches, try searching for "yt8821". If that
   matches something, you have the Cudy M3000 with the Motorcomm PHY
   and you should use this device tree
   (mt7981b-cudy-m3000-v2-yt8821.dts).
 - If even the yt8821 string did not match anything, then something
   is wrong. Rebooting the router might help (the system log would
   be refreshed).

Installation via the Cudy web UI:
 - Download the signed intermediary firmware from
   https://drive.google.com/drive/folders/1BKVarlwlNxf7uJUtRhuMGUqeCa5KpMnj
 - Flash the intermediary firmware using the Cudy web UI
 - Connect a PC/laptop to the "1Gbps LAN" port
 - Open http://192.168.1.1 in your browser, log in
   (the password should be empty)
 - Flash your desired OpenWrt firmware via LuCI
 - The router should reboot into the desired firmware

How to access UART (citing from 20e4a18feb):
 - remove rubber ring on the bottom
 - remove screws
 - pull up the cylinder, maybe help by push on an ethernet socket
   with a screwdriver
 - remove the (3) screws holding the board in the frame
 - remove the board from the frame to get to the screws for the
   silver, flat heat shield
 - remove the (3) screws holding the heat shield
 - solder UART pins to the back of the board
   - make sure to have the pins point out on side with the black,
     finned heat spread
   - the markings for the pins are going to be below the silver heat
     shield
   - Vcc is not needed
 - the UART parameters are 115200 baud, 8n1

Installation via UART (citing from 20e4a18feb):
 - attach an Ethernet cable to the "1Gbps LAN" port on the router
 - hold the reset button while powering the router
 - press CTRL-C or wait for the timeout to get to the U-Boot prompt
 - prepare a TFTP server on the network to supply ..-initramfs-kernel.bin
 - use 'tftpboot 0x46000000 ..-initramfs-kernel.bin' in the U-Boot
   shell to pull the image (change the file name accordingly)
 - boot the image using 'bootm 0x46000000'
 - push the ..-sysupgrade to the router using your preferred method
 - perform the upgrade with 'sysupgrade -n'

Signed-off-by: Jakub Vaněk <linuxtardis@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/22259
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
Jakub Vaněk 2026-03-02 21:14:28 +01:00 committed by Hauke Mehrtens
parent 8ef564bcda
commit 45b51ebaff
7 changed files with 244 additions and 190 deletions

View file

@ -2,6 +2,7 @@ set_preinit_iface() {
case $(board_name) in
bazis,ax3000wm|\
cudy,m3000-v1|\
cudy,m3000-v2-yt8821|\
cudy,tr3000-256mb-v1|\
cudy,tr3000-v1|\
cudy,tr3000-v1-ubootmod|\

View file

@ -2,106 +2,15 @@
/dts-v1/;
#include "mt7981b.dtsi"
#include "mt7981b-cudy-m3000.dtsi"
/ {
model = "Cudy M3000 v1";
compatible = "cudy,m3000-v1", "mediatek,mt7981";
aliases {
label-mac-device = &gmac0;
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_status: internet-white {
function = LED_FUNCTION_WAN_ONLINE;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
internet-red {
function = LED_FUNCTION_WAN_ONLINE;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 4 GPIO_ACTIVE_LOW>;
};
wan {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 5 GPIO_ACTIVE_LOW>;
};
lan {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
phy-handle = <&rtl8221b_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 0>;
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 1>;
};
};
&mdio_bus {
rtl8221b_phy: ethernet-phy@1 {
wan_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <1>;
reset-assert-us = <100000>;
@ -111,100 +20,3 @@
interrupt-parent = <&pio>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: spi_nand@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
};
factory: partition@180000 {
label = "Factory";
reg = <0x0180000 0x0200000>;
read-only;
};
bdinfo: partition@380000 {
label = "bdinfo";
reg = <0x0380000 0x0040000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_de00: macaddr@de00 {
#nvmem-cell-cells = <1>;
compatible = "mac-base";
reg = <0xde00 0x6>;
};
};
};
partition@3c0000 {
label = "FIP";
reg = <0x03c0000 0x0200000>;
read-only;
};
partition@5c0000 {
label = "ubi";
reg = <0x05c0000 0x4000000>;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&wifi {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
};

View file

@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt7981b-cudy-m3000.dtsi"
/ {
model = "Cudy M3000 v2 with Motorcomm YT8821";
compatible = "cudy,m3000-v2-yt8821", "mediatek,mt7981";
};
&mdio_bus {
wan_phy: ethernet-phy@1 {
compatible = "ethernet-phy-id4f51.ea19";
reg = <1>;
reset-assert-us = <100000>;
reset-deassert-us = <100000>;
reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&pio>;
};
};

View file

@ -0,0 +1,195 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt7981b.dtsi"
/ {
aliases {
label-mac-device = &gmac0;
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_status: internet-white {
function = LED_FUNCTION_WAN_ONLINE;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
internet-red {
function = LED_FUNCTION_WAN_ONLINE;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 4 GPIO_ACTIVE_LOW>;
};
wan {
function = LED_FUNCTION_WAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 5 GPIO_ACTIVE_LOW>;
};
lan {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
phy-handle = <&wan_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 0>;
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 1>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: spi_nand@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
};
factory: partition@180000 {
label = "Factory";
reg = <0x0180000 0x0200000>;
read-only;
};
bdinfo: partition@380000 {
label = "bdinfo";
reg = <0x0380000 0x0040000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_de00: macaddr@de00 {
#nvmem-cell-cells = <1>;
compatible = "mac-base";
reg = <0xde00 0x6>;
};
};
};
partition@3c0000 {
label = "FIP";
reg = <0x03c0000 0x0200000>;
read-only;
};
partition@5c0000 {
label = "ubi";
reg = <0x05c0000 0x4000000>;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&wifi {
status = "okay";
mediatek,mtd-eeprom = <&factory 0x0>;
};

View file

@ -130,6 +130,7 @@ mediatek_setup_interfaces()
;;
bazis,ax3000wm|\
cudy,m3000-v1|\
cudy,m3000-v2-yt8821|\
cudy,tr3000-256mb-v1|\
cudy,tr3000-v1|\
cudy,tr3000-v1-ubootmod|\

View file

@ -92,6 +92,7 @@ case "$board" in
cudy,ap3000wall-v1|\
cudy,ap3000-v1|\
cudy,m3000-v1|\
cudy,m3000-v2-yt8821|\
cudy,re3000-v1|\
cudy,tr3000-256mb-v1|\
cudy,tr3000-v1|\

View file

@ -1147,6 +1147,28 @@ define Device/cudy_m3000-v1
endef
TARGET_DEVICES += cudy_m3000-v1
define Device/cudy_m3000-v2-yt8821
DEVICE_VENDOR := Cudy
DEVICE_MODEL := M3000
DEVICE_VARIANT := v2 with Motorcomm YT8821
DEVICE_DTS := mt7981b-cudy-m3000-v2-yt8821
DEVICE_DTS_DIR := ../dts
SUPPORTED_DEVICES += R37
DEVICE_DTS_LOADADDR := 0x44000000
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
KERNEL_IN_UBI := 1
KERNEL := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-phy-motorcomm
endef
TARGET_DEVICES += cudy_m3000-v2-yt8821
define Device/cudy_re3000-v1
DEVICE_VENDOR := Cudy
DEVICE_MODEL := RE3000