On RTL930x, each SerDes pair shares a set of PLLs with different
capabilities (LC PLL: 1G/2.5G/10G, ring PLL: 1G/2.5G). In principle,
this allows any combination of speeds on a SerDes pair. However, it
creates a special case when trying to configure a SerDes for 10G while
the LC PLL is already in use at a slower speed for the neighbor SerDes.
The current implementation just gives up in that case. Instead, free up
the LC PLL by reconfiguring the neighbor SerDes to the ring PLL.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/20568
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit fixes mistaken executable bit on dts files.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/20676
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It is not necessary to have two different family_id checks directly after
another. It is simpler to just combine both into one.
Suggested-by: Álvaro Fernández Rojas <noltari@gmail.com>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20637
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
The rtl838x_rate_control_init() and rtl839x_rate_control_init() functions
were never called because the rtl83xx_setup_qos() always returned after the
QoS configuration
Fixes: dc9cc0d3e2 ("realtek: add QoS and rate control")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20637
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
symtom: macs not properly incremented (all macs the same)
solution: set correct offset to mac location
Signed-off-by: Scott Mercer <TheRootEd24@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20664
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The BPi-R4 Lite is a WiFi-7 router board based on the MT7987 SoC.
Specification :
- SOC: Mediatek MT7987A (4x Cortex-A53
- RAM: 2GB
- Flash: 32MB SPI NOR, 256MB SPI NAND, 8GB eMMC
- Switch: MediaTek MT7531AE
- Ports : 4x LAN (1G), 1x SFP (via MT7531), 1x WAN (2.5G)
- Buttons : Reset & WPS/Mesh
- LEDs : Status (PWM), SFP
- USB: on-board VIA VL817 USB3.1/USB2.0 hub
* 1 - mPCIe B (SIM3)
* 2 - NGFF-KEYB (SIM1)
* 3 - USB-A connector
* 4 - mPCIe A (SIM4)
- mPCIe: 1x 8GT/s x2 or 2x 8GT/s x1 (configurable via bootloader)
- RTC: PCF8563
- mikroBUS socket with SPI, I2C and full UART
- on-board HT42B534 USB-to-serial for Type-C console port
- Power: USB Type-C PD 20V, or DC via barrel connector or JST-VH 3.96
Installation:
Uncompress *sdcard.img.gz and write to microSD card, eg. using 'dd'.
Use bootloader menu on the serial console to install SPI-NAND or SPI-NOR,
once installed to SPI-NAND you can use the bootloader menu to install to
eMMC. See instructions for BananaPi R3 for details.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import and clean DT and DT-overlay files from MediaTek's SDK to build
an image with various DT-overlays for the MT7987 reference board.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Import patches to use cpufreq voltage calibration data from the efuse on
MT7988, and add support for MT7987.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The MT7987 has two LVTS thermal sensors, one covering all CPU cores,
and one for the built-in 2.5GE PHY.
Add support for MT7987 to the LVTS thermal driver.
Thanks to Chad Monroe of Adtran for providing cleaned up patches for
Linux 6.6 which have been ported to Linux 6.12.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Compared to MT7988 (NETSYSv3) the Ethernet Frame Engine of MT7987
has been slighly updated (NETSYSv3.1), among other things the packet
scheduler (shaper) has apparently been reworked.
Import patches for basic support of the Ethernet Frame Engine of the
MT7987 SoC.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The MT7987 is mostly a stripped-down low-pin-count version of the
MT7988 without the 10GBit/s SerDes. Most existing drivers can be reused.
Import to-be-sent-upstream patches doing all the groundwork for
basic support for the MT7987 SoC, adding clk, pinctrl and pwm support.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Currently the detection of external-data FIT images works by checking
if the FIT structure is more than 4 kiB. However, for boards with lots
of different DT-overlays and configurations the FIT structure can
exceed 4 kiB which results in the FIT splitter to fail detecting the
rootfs.
Increase the threshold for external-data FIT to 512 kiB as there aren't
any kernel images smaller than that, and FIT structure less than 512 kiB
will always be an external-data FIT.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Make functions in b53 static and add kernel
patch to fix prototype build errors
Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20653
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
After switching to the 6.12 kernel, time to remove 6.6 support.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20614
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Linux 6.12 has been validated on Layerscape platforms, including NXP
reference boards and multiple custom designs. Tests covered system
boot, networking, storage, and common peripherals, with no regressions
observed.
Enable 6.12 as the default to continue broader testing and integration.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20614
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
On the LS1012A-FRDM both PHY reset pins are tied to GPIO1_23.
Up to Linux 6.6, pinctrl did not touch this GPIO and the reset
line remained in the state set by U-Boot. Starting from 6.12,
the kernel requires explicit configuration of this pin, otherwise
the PHYs fail to be detected.
This adds a gpio-hog node to ensure the reset line stays asserted,
fixing PHY detection on boot.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20614
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Drop support for kernel 6.6 as now kernel 6.12 is set as default kernel
version.
Link: https://github.com/openwrt/openwrt/pull/20644
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Move the ipq806x target to kernel 6.12 by default as every kernel bump
problem has been handled.
Link: https://github.com/openwrt/openwrt/pull/20644
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The Google OnHub doesn't init the SMEM in SBL causing the CPUFreq driver
to fail probe. This is caused by the fact that new CPUFreq driver makes
use of SMEM to identify the SoC variant and on Google OnHub this is not
available.
Backport patch to detect this state and fallback to compatible
matching fixing the CPUFreq driver.
Link: https://github.com/openwrt/openwrt/pull/20587
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This device is very similar to the already supported XGS1210-12 A1. For
now, only revision A1 is supported (not marked on the label).
Hardware:
- RTL9302B SoC
- 16 MiB NOR flash
- 128 MiB DDR3 SDRAM
- 8x 1G RJ45 (RTL8218D)
- 2x 2.5G RJ45 (2x RTL8226)
- 2x SFP+ (supporting 1G/2.5G/10G)
- 3.3V UART serial (115200 baud 8N1) on the right side of the case
(from bottom to top: GND, RX, TX, VCC)
It is originally an unmanaged switch, so there are a few differences:
- No reset button
- Different partition layout: There is some reserved space in the middle
of the flash which might be used by the bootloader for flash testing.
The remaining space in between is used for OpenWrt using mtd-concat.
The largest contiguous area is at the beginning, allowing a maximum
kernel size of 7 MiB.
- No individual MAC address: This device ships with an empty U-Boot
environment. When an OpenWrt squashfs image is booted for the first
time, a random MAC address will be written to the environment (but
only if the environment has been initialized from the bootloader
before and contains the default MAC address).
Steps to boot initramfs image via network:
- Configure a TFTP server to provide the OpenWrt initramfs image
- Connect to device using serial (see hardware information above)
- Power on the device and enter U-Boot using Esc when prompted
- Run the following commands (adjust as necessary):
# rtk network on
# tftpboot 0x84f00000 192.168.1.100:openwrt-xgs1010-initramfs.bin
# bootm
Installation on flash:
- Boot initramfs image as described above
- Now is a good time to create a backup of all flash partitions! You'll
need this if you want to revert to the unmanaged factory firmware at
some point.
- Use sysupgrade to install OpenWrt
- After restart enter U-Boot again and set the boot command:
# setenv bootcmd 'rtk network on; bootm 0xb4900000'
# saveenv
# run bootcmd
Note: The command "rtk network on" is only needed because the drivers
currently rely on some setup by the bootloader (without this the RJ45
ports don't work). If the drivers improve in the future, it should be
removed (i.e. change the boot command to "bootm 0xb4900000").
Reverting to factory firmware:
- Write back your backup of the firmware partition (or write just the
fwconcat1 partition, and erase the other two fwconcat partitions)
- Change the boot command back to "boota" (or just erase the u-boot-env
partition so the default gets used)
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/20469
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is a preparation for adding support for XGS1010-12, which is almost
identical to XGS1210-12, with some small differences (partition layout,
missing reset key).
In addition to moving the common parts to a new file, also simplify the
definition of the 2.5G PHYs to reduce duplication. With this change, the
revision-specific files only have to specify the SMI addresses.
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Link: https://github.com/openwrt/openwrt/pull/20469
Signed-off-by: Robert Marko <robimarko@gmail.com>
After having moved RTL93XX SerDes configuration from PHY to PCS driver,
the DSA driver doesn't need to know about SerDes explicitly anymore.
Although RTL83XX SerDes is still partly managed within the DSA driver,
it doesn't make use of the sds_num property/field. RTL93XX was the only
user of this right now.
Thus, we can just remove the remaining 'sds_num' code which doesn't
serve any purpose anymore.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20577
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL93XX SerDes is entirely managed through the PCS driver and not
treated as PHYs anymore. Thus, remove the leftovers from the DSA driver.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20577
Signed-off-by: Robert Marko <robimarko@gmail.com>
Drop the now unused SerDes code for RTL930X from rtl83xx-phy driver as
the SerDes is completely managed by the PCS driver.
This marks a breaking point because RTL930X SerDes is no longer treated
as a regular PHY device.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20577
Signed-off-by: Robert Marko <robimarko@gmail.com>
RTL93XX reached the point where the SerDes' are no longer treated as
regular PHYs. Instead, they are managed by the dedicated PCS driver.
Thus, all device tree definitions should follow this change.
Remove the pseudo-PHYs for the SerDes (so far usually defined with macro
INTERNAL_PHY) and corresponding 'phy-handle's from all SFP ports. This
removes a long-lasting confusion from our Realtek driver(s).
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20577
Signed-off-by: Robert Marko <robimarko@gmail.com>
When Realtek SerDes is completely handled by PCS, it is not treated as
a regular PHY anymore. Thus, we should be able to drop the currently
used pseudo-PHYs and phy-handles for ports which just use the SerDes as
PCS but have no PHY attached.
Allow to drop the phy-handle from switch port definitions if there is a
pcs-handle defined by relaxing several checks in the DSA driver.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20577
Signed-off-by: Robert Marko <robimarko@gmail.com>
Check for and handle an error which may be returned by rtpcs_create in
various cases.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20577
Signed-off-by: Robert Marko <robimarko@gmail.com>
The code to add bootstrapping for 10G-QXGMII on RTL930X broke the only
devices which are using 10G-QXGMII on RTL930X (Plasma Cloud PSX8+PSX10) in
OpenWrt. It is currently unknown what other changes are pending to get this
correctly working. But both the `rtpcs_930x_sds_usxgmii_config()` call and
the write of the "magic" SerDes values in the patching process break the
SerDes connected to the RTL8224 PHYs.
The Plasma Cloud PSX8+PSX10 devices get their RTL8224 and the 10G-QXGMII
SerDes bootstrapped directly by u-boot.
Fixes: dca20f91ea ("realtek: add serdes patch for 10G_QXGMII")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20588
Signed-off-by: Robert Marko <robimarko@gmail.com>
Package driver for Broadcom V3D 3.x or newer GPUs.
SoCs supported include the BCM2711, BCM7268 and BCM7278.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Align the sorting of cases with other targets.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20603
Signed-off-by: Robert Marko <robimarko@gmail.com>
Merge identical case in base-files.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20603
Signed-off-by: Robert Marko <robimarko@gmail.com>
This removes the obsolete trailing whitespaces from all base-files cases
to be in line with other targets.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20603
Signed-off-by: Robert Marko <robimarko@gmail.com>
Switch the mac lookup to NVMEM on UBI layout and add label-mac
Signed-off-by: Steffen Förster <nemesis@chemnitz.freifunk.net>
Link: https://github.com/openwrt/openwrt/pull/20612
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix Totolink X6000R image failing to upgrade via sysupgrade due to an
incorrect upgrade case. The fallback upgrade path used the NAND upgrade
routine, which caused the "layout volume not found" error on NOR flash
devices. By adding a specific case for this board, sysupgrade now uses
`default_do_upgrade`, which is compatible with the NOR flash layout.
Fixes: 7cd10ad
Signed-off-by: Ayra Hikari <ayrahikari@linuxmail.org>
Since 6b43a52171, the PHY is using interrupts instead of polling. It
turned out that the interrupt number is wrong and the WAN port doesn't
work. This commit fixes this bug.
Fixes: 6b43a52171 ("mediatek: mt7622: add the missing phy interrupt-parent for WAX206")
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Commits d205878ede and 46cf10771a relabeled the supported Zyxel devices
from v1/v2 to A1/B1, but board setup files were overlooked.
Fixes: d205878ede ("rtl838x: rename GS1900 series v1/v2 to A1/B1")
Fixes: 46cf10771a ("rtl839x: rename GS1900 series v1/v2 to A1/B1")
Signed-off-by: Stijn Segers <foss@volatilesystems.org>
Link: https://github.com/openwrt/openwrt/pull/20590
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add support to the airoha target for the OpenWrt-specific DT property
`openwrt,netdev-name`. In particular, this is for interfaces under
non-DSA `airoha_eth` interfaces.
This will avoid conflicts with upstream code[1]; and maintain forward
compatibility with OpenWrt configurations if/when `airoha_eth` becomes
a full DSA driver.
[1] https://lore.kernel.org/netdev/20240709124503.pubki5nwjfbedhhy@skbuf/
Borrowed from d4d6c48 (mediatek: filogic: support openwrt,netdev-name for renaming interfaces)
Signed-off-by: Kenneth Kasilag <kenneth@kasilag.me>
Link: https://github.com/openwrt/openwrt/pull/20475
Signed-off-by: Robert Marko <robimarko@gmail.com>
The device is the little brother of the already supported ASUS Lyra but
with the flash configuration/layout of the RT-AC58U.
Hardware
--------
SOC: Qualcomm IPQ4019
FLASH: 2MB (Macronix MX25L1606E)
128MB (GigaDevice GD5F1GQ4UCYIG)
RAM: 256MB (Nanya NT5CC128M16IP-DI)
WIFI: Qualcomm IPQ4019
BT: Atheros AR3012-BL3D
ETH: 1x WAN, 1x LAN
LED: 1 RBG LED
BTN: WPS, Reset
UART: 115200 8N1 (square pin = VCC) VCC-TX-RX-GND
MAC addresses
-------------
LAN 2.4G + 1
WAN 2.4G + 3
2.4G Label MAC (stored in factory offset 0x1006)
5G 2.4G + 2 (stored in factory offset 0x5006)
Installation
------------
SSH
---
1. Reset the device, setup and enable SSH.
2. Transfer initramfs.itb to /tmp on the device.
3. SSH into the router, credentials are the same as in the web ui.
4. Write initramfs to linux partition:
mtd-write -d linux -i initramfs.itb
5. Reboot and wait for OpenWrt to boot.
6. Transfer sysupgrade.bin to /tmp on the device.
7. SSH into the router, user root, no pw.
8. Delete jffs2 ubi partition:
ubirmvol /dev/ubi0 --name=jffs2
9. Flash OpenWrt:
sysupgrade -n sysupgrade.bin
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20573
Signed-off-by: Robert Marko <robimarko@gmail.com>
Datasheet claims this register bit is supposed to be set by default,
however it was found in practice to not be, and OEM drivers would set
this bit at the same time.
Signed-off-by: Richard Huynh <voxlympha@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20465
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Fix typo in register for the serdes global config.
Fixes: ddb0cd276c ("kernel: rtl8261n: add support for Serdes TX swap")
Signed-off-by: Richard Huynh <voxlympha@gmail.com>
[ add commit description ]
Link: https://github.com/openwrt/openwrt/pull/20465
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Backport upstream minor fixed for NPU handling that might result in
kernel panic or handle leak.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add missing leds and network board files for EN7581 SoC.
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
[ drop reference to downstream 10g RFB board ]
Link: https://github.com/openwrt/openwrt/pull/20556
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Similar to e92b153e99 ("mediatek: introduce KERNEL_LOADADDR to Device/Default template"),
let's move the default loadaddr to Device/Default.
What's more, use 0x80200000 instead of the SDK default value 0x80088000
to avoid the following error which may overwrite TZ memory and cause crash:
[ 0.000000] [Firmware Bug]: Kernel image misaligned at boot, please fix your bootloader!
[ 0.000000] OF: reserved mem: Reserved memory: failed to reserve memory for node 'atf@80000000': base 0x0000000080000000, size 2 MiB
Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
[ fix spelling mistake ]
Link: https://github.com/openwrt/openwrt/pull/20470
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Enable USB node on eMMC RFB board and disable USB2 3.0 port to make the
3rd PCIe line correctly work.
This is needed to prevent the xHCI driver to mess with PCIe by
configuring the USB2 3.0 port. Port will still be detected but won't be
configureed by the driver and won't have PHY to configure for.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
