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layerscape: configure PHY reset GPIO on LS1012A-FRDM

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On the LS1012A-FRDM both PHY reset pins are tied to GPIO1_23.
Up to Linux 6.6, pinctrl did not touch this GPIO and the reset
line remained in the state set by U-Boot. Starting from 6.12,
the kernel requires explicit configuration of this pin, otherwise
the PHYs fail to be detected.

This adds a gpio-hog node to ensure the reset line stays asserted,
fixing PHY detection on boot.

Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20614
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Pawel Dembicki 2025-11-01 23:26:20 +01:00 • committed by Christian Marangi
parent 2352de96c1
commit 7e4ba852b6
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GPG key ID: AC001D09ADBFEAD7
1 changed files with 36 additions and 0 deletions
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36
target/linux/layerscape/patches-6.12/900-layerscape-dts-ls1012a-frdm-add-GPIO-hog-for-PHY-res.patch Normal file
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@ -0,0 +1,36 @@
From 3efb7aeefef62886be0dde83f6340d1a1bfcb5f6 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Fri, 31 Oct 2025 22:46:05 +0100
Subject: [PATCH] layerscape: dts: ls1012a-frdm: add GPIO hog for PHY reset
On LS1012A-FRDM both PHY reset pins are tied to GPIO1_23 (active-low).
Older kernels preserved the U-Boot-configured level, but since 6.12 the
pin may default to an undefined state early in boot, leaving the PHYs in
reset and breaking detection.
Add a GPIO hog on gpio1[23], configured as output-high, to keep the
reset line deasserted from early boot.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
@@ -87,6 +87,15 @@
status = "okay";
};
+&gpio0 {
+ phy-reset-hog {
+ gpio-hog;
+ gpios = <23 1>;
+ output-low;
+ line-name = "phy-reset";
+ };
+};
+
&i2c0 {
status = "okay";