RTL930x received support for specifying active low/high LEDs in commit
bec9e79a99 ("realtek: dsa: support active-high LEDs"). But this was
completely forgotten on RTL931x.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The usage of pr_* helper inside a device driver should be avoided. The
dev_* helper provide more context about which device the message actually
is.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The integration of the LED set initialization for RTL931x added also minor
improvements in the coding style. Just adopt them also for RTL9301x.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
of_property_count_u32_elems returns the number of u32 and not the number of
bytes. It must therefore be checked against the number of u32 in set_config
and not the bytes in set_config.
Fixes: 2cfb1ecf10 ("rtl930x: Rework per port LED configuration")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There are switches which share the same overall hardware design but remove
just a couple of components for the low cost variant. For example, a 8+2
(ethernet+SFP) switch might have a low cost variant which only has 8
ethernet ports. In this case, the PCB will be shared but components for SFP
will just be dropped.
The LED shift registers will be the same between the two switches but the
ports are different. But since the rtl930x_led_init code is trying to
calculate the number of LEDs using the LED ports, the ethernet status ports
will then suddenly be shifted by two ports.
It is therefore necessary to have a mechanism to overwrite the detection of
the ethernet ports in the LED initialization and force some ports to
"virtually there" for the LED controller.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20300
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit renames all management network ports of the
SN2100, SN2700, SN3420, and SN3700 switches based
on their PCI address during boot.
For the default network config, the management and
QSFP port(s) are put into the br-lan bridge.
Signed-off-by: Til Kaiser <mail@tk154.de>
Link: https://github.com/openwrt/openwrt/pull/17251
Signed-off-by: Robert Marko <robimarko@gmail.com>
This is Allwinner's ARM926EJ-S core, which is one of its early
products, reappearing in recent compact designs. The SoC includes
32/64Mb memory in the same physical package, and has display and USB
interfaces, allowing for very small footprint boards.
The target consists of basic 6.12 support, with u-boot. Instead of creating
a separate suniv target, as both the kernel and u-boot supports enough of
this SoC by now with minimal patching, add it into sunxi as a subtarget.
Link: https://github.com/openwrt/openwrt/pull/15022
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
The first RTL931x devices make their way into OpenWrt. Their copper
ports are driven by different interfaces modes like 10G_QXGMII or
Realtek proprietary XSGMII. The DSA driver has no proper handling
for theses modes implemented yet. So a lot is auto-mapped to USXGMII
internally. As soon as the SerDes setup activates this (wrong) mode
the PHY connectivity breaks.
Disable this mode for now and rely on the proper U-Boot setup.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20292
Signed-off-by: Robert Marko <robimarko@gmail.com>
Now the NAND targets have real devices that need to be built.
Remove the source-only flag to make the images available.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20255
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Realtek NAND kernel configuration has some shortcomings.
Fix this as follows:
- MTD_NAND_ECC_REALTEK selects MTD_NAND_ECC and this selects
MTD_NAND_CORE. For consistency add both config options.
- The partition layout of the Linksys switches requires some tricky
concatenation to keep dual boot active. Add CONFIG_MTD_VIRT_CONCAT
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20255
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Also handle 2.4ghz LED in ath9k instead of generic.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20269
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Plasma Cloud PAX1800-Lite is a dual-band Wi-Fi 6 router, based on MediaTek
MT7621A + MT79x5D platform.
Specifications:
- SOC: MT7621AT (880 MHz)
- DRAM: DDR3 448 MiB (Nanya NT5CC256M16DP-DI)
- Flash: 2 MiB SPI NOR (S25FL016K) + 128 MB SPI NAND (W25N02KVZEIR)
- Ethernet: 1x 10/100/1000 Mbps (SOC's built-in switch, with PoE+)
- Wi-Fi: 2x2:2 2.4/5 GHz (MT7905DAN + MT7975DN)
(MT7905DAN doesn't support background DFS scan/BT)
- LED: tri-color LED for status (red, blue, green)
- Buttons: 1x (reset)
- Antenna: 4x internal, non-detachable omnidirectional
- UART: 1x 4-pin (2.54 mm pitch, marked as "3V3 G/RX GND W/TX")
- Power: 12 V DC/2 A (DC jack)
MAC addresses:
WAN: 54:9C:27:xx:xx:00 (factory 0x3fff4, device label)
2.4 GHz: 54:9C:27:xx:xx:02 (factory 0x4, device label +2)
5 GHz: 54:9C:27:xx:xx:08 (factory 0xa, device label +8)
Flashing instructions:
======================
Various methods can be used to install the actual image on the flash.
Two easy ones are:
ap51-flash
----------
The tool ap51-flash (https://github.com/ap51-flash/ap51-flash) should be
used to transfer the image to the u-boot when the device boots up.
initramfs from TFTP
-------------------
The serial console (115200 8N1) must be used to access the u-boot shell
during bootup. It can then be used to first boot up the initramfs image
from a TFTP server (here with the IP 192.168.1.21):
setenv serverip 192.168.1.21
setenv ipaddr 192.168.1.1
tftpboot 0x83001000 <filename-of-initramfs-kernel>.bin && bootm $fileaddr
The actual sysupgrade image can then be transferred (on the LAN port) to the
device via
scp <filename-of-squashfs-sysupgrade>.bin root@192.168.1.1:/tmp/
On the device, the sysupgrade must then be started using
sysupgrade -n /tmp/<filename-of-squashfs-sysupgrade>.bin
Signed-off-by: Sven Eckelmann (Plasma Cloud) <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20152
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After extracting the EEPROMs of different devices, only the 0x4 address is unique.
Use the 0x4 address as the LAN address, and the LAN+1 address as the WAN address.
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20256
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
According to the MT7628 hardware datasheet:
- GPIO/4 was originally used for I2C, but is now used as the Modem Power.
- GPIO/5 was originally used for I2C, but is now used as the SIM card select. (n/a for this device)
- GPIO/6 was originally used for SPI CS1, but is now used as the Serial mode switch.
- GPIO/36 was originally used for PERST, but is now used as the GPS OE. (n/a for this device)
- GPIO/38 was originally used for WDT, but is now used as the Modem2 Power. (n/a for this device)
- GPIO/44 was used for WLED_AN, but is now controlled by `gpio-leds`.
Corrected pinctrl to ensure it works properly in the future.
Signed-off-by: Coia Prant <coiaprant@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20256
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now the rtl931x target has real devices that need to be built. Remove the
source-only flag to make the images available.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud ESX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_esx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_esx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_esx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Plasma Cloud PSX28 Switch is a 24 + 4 port multi-GBit switch with
24x 10/100/1000/2500BaseT Ethernet ports and 4x SFP+ module slot.
Hardware:
- RTL9312C SoC
- Macronix MX25L25645G (32MB flash)
- 512MB DDR3 SDRAM
- RTL8231 GPIO extender to control the port LEDs
- 6x RTL8224 4x 10m/100m/1/2.5 Gigabit PHY
- SFP+ 4x 10GBit slot
- RTL8239 POE++ PSE controller with frontend MCU
The switch is powered directly via AC.
The external RS232 serial connector (RJ45, Cisco pinout) can be used to
access the terminal. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial on front panel. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
sysupgrade -n /tmp/openwrt-realtek-rtl931x-plasmacloud_psx28-squashfs-sysupgrade.bin
Installation via u-boot
-----------------------
If you have an TFTP server connected to the switch, it is possible to
directly install the device using the factory image from u-boot
# setup networking and IP of TFP server
rtk network on
setenv ipaddr 10.100.100.99
setenv serverip 10.100.100.20
# get factory image
tftp 0x84000000 factory.bin
# erase firmware partitions
sf probe 0
sf erase 0x5e0000 0x1a20000
# write firmware to both partitions
sf write ${fileaddr} 0x5e0000 ${filesize}
sf write ${fileaddr} 0x12f0000 ${filesize}
# adjust the boot commands
setenv bootargs "mtdparts=spi0.0:768k(u-boot),64k(u-boot-env),64k(u-boot-env2),5120k(reserved),13376k(inactive),13376k(firmware2)"
setenv bootcmd "rtk init; bootm 0xb52f0000"
# restart
reset
Debug
-----
* Connect serial on front panel. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enter passwords: "1234" or "plasmapsx"
* Enable network:
rtk network on
* Change ip address of device:
setenv ipaddr 192.168.1.6
* Download initramfs from TFTP server:
tftpboot 0x84000000 192.168.1.111:openwrt-realtek-rtl931x-plasmacloud_psx28-initramfs-kernel.bin
* Boot loaded file:
bootm 0x84000000
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
To be able to read out the ethaddr from the u-boot environment for MAC
address configuration, it is required to also enable the NVMEM layout
parsing code for the U-Boot env layout.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20172
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
OpenWrt buildroot will compile all dtbs defined in target to
$(KDIR)/image-$(DEVICE_DTS).dtb, so make use of it to allow us
debug and use external dtbs easier without patching kernel Makefile.
This also fixes commit 5c724939c3 which forgot to update DTS_DIR
in KERNEL variable.
Fixes: 5c724939c3 ("rockchip: add DEVICE_DTS_DIR definition")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20286
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If transmissions are done outside of the DSA switch (directly from the CPU
port), the STP state must not block the transmission. Otherwise, STP frames
are not correctly submitted and the STP frames cannot correctly detect
loops before switching a port in the forwarding state.
The same applies for the LLDP frames. These must be submitted independent
of the STP state to identify neighbors or configure POE limits.
It is not necessary to filter specific destination mac addresses because
the transmission was done outside the bridge/switch in the first place. The
transmission is therefore forced.
Signed-off-by: Issam Hamdi <ih@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <sven@narfation.org>
Signed-off-by: Sven Eckelmann <sven@narfation.org>
Link: https://github.com/openwrt/openwrt/pull/20184
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL930X and RTL931X SoCs support port-based, flow-based, and
RSPAN-based mirroring. Like for other SoCs from the realtek target, only
the port based port mirroring can be exposed using Linux's tc subsystem.
The port_mirror_add() implementation was updated with the following
considerations for RTL93xx SoCs:
* mirrored packets must pass through the TX pipeline of the mirroring
port, so they are subject to configuration such as VLAN tagging,
remarking, and EVC
* when a packet hits both source ports (SPM) and destination port (DPM) of
a mirror group, the egress port traffic will be mirrored
The port_mirror_del() function doesn't require any modifications.
Signed-off-by: Sharadanand Karanjkar <sk@simonwunderlich.de>
Co-developed-by: Sven Eckelmann <se@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20264
Signed-off-by: Robert Marko <robimarko@gmail.com>
Instead of using a lot of if-else blocks in the port mirror code, provide
SoC specific function which calculates the SoC specific portions. The
generic part of the port mirroring code can then simply operate on the
calculated register addresses and values.
Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20264
Signed-off-by: Robert Marko <robimarko@gmail.com>
The FIT loadaddr on RK3308/RK3566/RK3568/RK358x is 0x02000000
instead of 0x02080000, while on RK3576 it's 0x42000000, which is
quite different from the former SoCs and incompatible with current
kernel loadaddr value.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20041
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Replace the pending I2C backport patches for RTL93XX added in
44655c97bb with the upstreamed variants. The patches have been accepted
upstream in the meantime and are included in v6.17 or v6.18.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20273
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL931x has next to its SPI flash controller a SPI master interface. It
is connected to
* SPI_CS#[1,0]: AH22 , AK22 (aka: GPIO 12, 11)
* SPI_CLK: AL23 (aka: GPIO 8)
* SPI_MISO: AM23 (aka: GPIO 9)
* SPI_MOSI: AL22 (aka: GPIO 10)
It is not the same as the SPI flash controller which uses pins:
* SPI_CS#[1,0]: B24, A24
* SPI_SCLK: A23
* SPI_SDI/SIO0: B21
* SPO_SDO_SIO1: B21
* SPI_SIO2: A22
* SPI_SIO3: B22
* SPI_RSTN: B23
As shown above, the SPI master controller shares its pin with GPIO 8, 9,
10, 11, 12. In some upcoming devices (like the Plasma Cloud PSX28/ESX28),
they will be used for SFP cage signaling. These pins must therefore be
switched manually to the GPIO mode.
The SPI_CTRL0 register provides all necessary configuration to enforce the
GPIO mode of the pins. And until more requirements (and a correct driver)
for the SPI master controller arise, it is therefore possible to use
pinctrl-single to configure it using the devicetree.
Previously the ethernet driver did configure the SPI master controller for
31.25 MHz. It is unknown for which kind of device this was originally made
and what was actually connected there. But this manual write to the
register conflicts potentially with the write of the pinctrl driver to the
same register. Luckily, we don't need this SPI speed configuration in the
ethernet driver. Still, to allow this device an easy migration, the
`spi0-31mhz` configuration was already prepared.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20263
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL8224 used by Plasma Cloud PSX8/PSX10 is not using USXGMII but
USXGMII 10G-QXGMII mode. The correct phy-mode string for this is
"10g-qxgmii".
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
The current SerDes implementation for RTL931x handles 10G-QXGMII via the
"usxgmii" PHY mode. This is not 100% correct because it is not a single
port with 10G (max) but 4 ports with 2.5G each.
To allow setting of the "10g-qxgmii" phy mode, just change the code for now
to use the same codepaths as USXGMII. This has to be cleaned up further
during the SerDes driver rewrites.
Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
The Plasma Cloud PSX28 and ESX28 are using RTL8224 as ethernet PHY. This
phy works perfectly fine on PSX8/PSX10 (RTL930x) but failed to establish a link
on rtl931x because the upstream realtek phy driver was not enabled.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
Deprecated. Replaced with nvmem.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Userspace handling is deprecated.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20176
Signed-off-by: Robert Marko <robimarko@gmail.com>
Upstream will get support for the Realtek ECC engine with 6.18.
To make use of this in Openwrt
- backport upstream patches
- change config so that ECC will be built for nand subtargets
- define ECC engine in RTL93xx DTS.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19746
Signed-off-by: Robert Marko <robimarko@gmail.com>
During testing, we discovered that when adding a new offload FDB rule
on certain VLANs and then delete it, does not work as expected.
Steps to Reproduce:
* Create VLAN 4094 on the port lan1:
bridge vlan add vid 4094 dev lan1 pvid
* Add a new FDB entry on port lan1 for VLAN 4094:
bridge fdb add 00:01:02:22:33:44 dev lan1 vlan 4094 master permanent
* Delete the new FDB entry on port lan1 for VLAN4094
bridge fdb del 00:01:02:22:33:44 dev lan1 vlan 4094 master permanent
Root Cause:
The failure occurs because the hash_msb flag is not set correctly
based on the VLAN ID when adding a new L2 entry.
Signed-off-by: Issam Hamdi <ih@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20183
Signed-off-by: Robert Marko <robimarko@gmail.com>
Align GS1900-10HP dts with other realtek devices to reduce the risk of device
specific regressions with the upcoming driver cleanup/rewrite.
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Link: https://github.com/openwrt/openwrt/pull/20228
Signed-off-by: Robert Marko <robimarko@gmail.com>
