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realtek: Work around missing 10g-qxgmii PHY mode

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The current SerDes implementation for RTL931x handles 10G-QXGMII via the
"usxgmii" PHY mode. This is not 100% correct because it is not a single
port with 10G (max) but 4 ports with 2.5G each.

To allow setting of the "10g-qxgmii" phy mode, just change the code for now
to use the same codepaths as USXGMII. This has to be cleaned up further
during the SerDes driver rewrites.

Suggested-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20239
Signed-off-by: Robert Marko <robimarko@gmail.com>
This commit is contained in:
Sven Eckelmann 2025-09-30 09:06:57 +02:00 • committed by Robert Marko
parent 657b61be2e
commit 4481e0c91d
2 changed files with 11 additions and 0 deletions
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6
target/linux/realtek/files-6.12/drivers/net/dsa/rtl83xx/common.c
View file

@ -359,6 +359,12 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv)
if (of_get_phy_mode(dn, &interface))
interface = PHY_INTERFACE_MODE_NA;
if (interface == PHY_INTERFACE_MODE_10G_QXGMII) {
interface = PHY_INTERFACE_MODE_USXGMII;
dev_warn(priv->dev, "handle mode 10g-qsxgmii internally as usxgmii for now\n");
}
if (interface == PHY_INTERFACE_MODE_USXGMII)
priv->ports[pn].is2G5 = priv->ports[pn].is10G = true;
if (interface == PHY_INTERFACE_MODE_10GBASER)

5
target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
View file

@ -1562,6 +1562,11 @@ static int rtmdio_probe(struct platform_device *pdev)
priv->interfaces[pn] = PHY_INTERFACE_MODE_NA;
dev_dbg(dev, "phy mode of port %d is %s\n", pn, phy_modes(priv->interfaces[pn]));
if (priv->interfaces[pn] == PHY_INTERFACE_MODE_10G_QXGMII) {
priv->interfaces[pn] = PHY_INTERFACE_MODE_USXGMII;
dev_warn(dev, "handle mode 10g-qsxgmii internally as usxgmii for now\n");
}
/*
* TODO: The MDIO driver does not need any info about the SerDes. As long as
* the PCS driver cannot completely control the SerDes, look up the information