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realtek: rtl93xx: Ignore STP for per port TX
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If transmissions are done outside of the DSA switch (directly from the CPU port), the STP state must not block the transmission. Otherwise, STP frames are not correctly submitted and the STP frames cannot correctly detect loops before switching a port in the forwarding state. The same applies for the LLDP frames. These must be submitted independent of the STP state to identify neighbors or configure POE limits. It is not necessary to filter specific destination mac addresses because the transmission was done outside the bridge/switch in the first place. The transmission is therefore forced. Signed-off-by: Issam Hamdi <ih@simonwunderlich.de> Co-developed-by: Sven Eckelmann <sven@narfation.org> Signed-off-by: Sven Eckelmann <sven@narfation.org> Link: https://github.com/openwrt/openwrt/pull/20184 Signed-off-by: Robert Marko <robimarko@gmail.com>
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2 changed files with 23 additions and 2 deletions
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@ -131,7 +131,10 @@ static void rtl839x_create_tx_header(struct p_hdr *h, unsigned int dest_port, in
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static void rtl930x_create_tx_header(struct p_hdr *h, unsigned int dest_port, int prio)
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{
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h->cpu_tag[0] = 0x8000; /* CPU tag marker */
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h->cpu_tag[1] = 0x0200; /* Set FWD_TYPE to LOGICAL (2) */
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h->cpu_tag[1] = FIELD_PREP(RTL93XX_CPU_TAG1_FWD_MASK,
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RTL93XX_CPU_TAG1_FWD_LOGICAL);
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h->cpu_tag[1] |= FIELD_PREP(RTL93XX_CPU_TAG1_IGNORE_STP_MASK, 1);
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h->cpu_tag[2] = 0;
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h->cpu_tag[3] = 0;
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h->cpu_tag[4] = 0;
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@ -147,7 +150,10 @@ static void rtl930x_create_tx_header(struct p_hdr *h, unsigned int dest_port, in
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static void rtl931x_create_tx_header(struct p_hdr *h, unsigned int dest_port, int prio)
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{
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h->cpu_tag[0] = 0x8000; /* CPU tag marker */
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h->cpu_tag[1] = 0x0200; /* Set FWD_TYPE to LOGICAL (2) */
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h->cpu_tag[1] = FIELD_PREP(RTL93XX_CPU_TAG1_FWD_MASK,
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RTL93XX_CPU_TAG1_FWD_LOGICAL);
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h->cpu_tag[1] |= FIELD_PREP(RTL93XX_CPU_TAG1_IGNORE_STP_MASK, 1);
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h->cpu_tag[2] = 0;
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h->cpu_tag[3] = 0;
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h->cpu_tag[4] = h->cpu_tag[5] = h->cpu_tag[6] = h->cpu_tag[7] = 0;
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@ -222,6 +222,21 @@
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/* Registers of the internal Serdes of the 8380 */
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#define RTL838X_SDS4_FIB_REG0 (0xF800)
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/* shared CPU tag definitions for RTL930X/RTL931X */
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#define RTL93XX_CPU_TAG1_FWD_MASK GENMASK(11, 8)
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#define RTL93XX_CPU_TAG1_FWD_ALE 0
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#define RTL93XX_CPU_TAG1_FWD_PHYSICAL 1
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#define RTL93XX_CPU_TAG1_FWD_LOGICAL 2
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#define RTL93XX_CPU_TAG1_FWD_TRUNK 3
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#define RTL93XX_CPU_TAG1_FWD_ONE_HOP 4
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#define RTL93XX_CPU_TAG1_FWD_LOGICAL_ONE_HOP 5
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#define RTL93XX_CPU_TAG1_FWD_UCST_CPU_MIN_PORT 6
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#define RTL93XX_CPU_TAG1_FWD_UCST_CPU 7
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#define RTL93XX_CPU_TAG1_FWD_BCST_CPU 8
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#define RTL93XX_CPU_TAG1_IGNORE_STP_MASK GENMASK(2, 2)
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/* Default MTU with jumbo frames support */
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#define DEFAULT_MTU 9000
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