mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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e2d3adc527
Following are the major issues in current implementation for checking the read errors 1. For checking the erased CW, NAND_ERASED_CW_DETECT_STATUS is being read inside qpic_nand_check_status. The qpic_nand_check_status will be called after complete page read so reading status register won’t help in getting the register value after each CW reads. 2. The mtd layer expects the driver to return non-negative integer representing the maximum number of bitflips that were corrected on any one ecc region. The mtd layer takes care of returning EUCLEAN based on returned number. 3. mtd->ecc_stats is only applicable when ECC engine is doing ECC correction. For raw reads, the stats should not be incremented. Now the changes have been done to reorganize the error handling 1. schedule the NAND_ERASED_CW_DETECT_STATUS reading after every CW read and check the same if ECC engine generates uncorrectable error. 2. For raw read, the ECC engine will never generate the uncorrectable error or erased CW so check only NAND_FLASH_STATUS. 3. The qpic_nand_read_oob should return the maximum number of bitflips that were corrected on any one ecc region so introduce the max_bitflips for maintaining the same. 4. The read should return the complete data in case of BADMSG so move the BADMSG check in the main read function. Change-Id: Ibef56294ace00d7cd67b501f623fb1d3aeb2c6ec Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> |
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| .. | ||
| nand | ||
| onenand | ||
| spi | ||
| ubi | ||
| altera_qspi.c | ||
| at45.c | ||
| cfi_flash.c | ||
| cfi_mtd.c | ||
| dataflash.c | ||
| ftsmc020.c | ||
| ipq_spi_flash.c | ||
| jedec_flash.c | ||
| Kconfig | ||
| Makefile | ||
| mtd-uclass.c | ||
| mtd_uboot.c | ||
| mtdconcat.c | ||
| mtdcore.c | ||
| mtdcore.h | ||
| mtdpart.c | ||
| mw_eeprom.c | ||
| st_smi.c | ||