Paul Burton 536cb7ce1a MIPS: refactor L1 cache config reads to a macro ... Reduce duplication between reading the configuration of the L1 dcache & icache by performing both using a macro which calculates the appropriate line & cache sizes from the coprocessor 0 Config1 register. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>		2015-01-29 12:55:01 +01:00
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cpu	MIPS: unify cache initialization code	2015-01-29 12:55:01 +01:00
include/asm	MIPS: avoid .set ISA for cache operations	2015-01-29 12:55:00 +01:00
lib	MIPS: refactor L1 cache config reads to a macro	2015-01-29 12:55:01 +01:00
config.mk	MIPS: add .padding section to linker script	2014-11-01 18:18:05 +01:00
Kconfig	MIPS: add Kconfig option for CONFIG_SWAP_IO_SPACE	2015-01-21 14:06:51 +01:00
Makefile	MIPS: replace $(CPU) with Kconfig symbols	2015-01-21 14:06:04 +01:00