mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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95e16ef259
Change-Id: Id5dd98e749bfd229e2c6e9d1944db397d2380cb1 Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
73 lines
2.4 KiB
C
73 lines
2.4 KiB
C
/*
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* Copyright (c) 2015-2016, 2018-2021 The Linux Foundation. All rights reserved.
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*
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* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef CLK_H
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#define CLK_H
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/* I2C clocks configuration */
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#ifdef CONFIG_IPQ_I2C
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// IPQ5018, IPQ6018, IPQ807X
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#if defined(CONFIG_IPQ5018) || defined(CONFIG_IPQ6018) || defined(CONFIG_IPQ807x)
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#define GCC_BLSP1_QUP1_I2C_APPS_CBCR 0x1802008
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#define GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR 0x180200C
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#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR 0x1802010
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#define GCC_BLSP1_QUP2_I2C_APPS_CMD_RCGR 0x1803000
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#define GCC_BLSP1_QUP2_I2C_APPS_CFG_RCGR 0x1803004
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#define GCC_BLSP1_QUP2_I2C_APPS_CBCR 0x1803010
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#else // IPQ9574, ipq5332
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#define GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR 0x1802018
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#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR 0x180201C
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#define GCC_BLSP1_QUP1_I2C_APPS_CBCR 0x1802024
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#define GCC_BLSP1_QUP2_I2C_APPS_CMD_RCGR 0x1803018
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#define GCC_BLSP1_QUP2_I2C_APPS_CFG_RCGR 0x180301C
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#define GCC_BLSP1_QUP2_I2C_APPS_CBCR 0x1803024
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#endif
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#define BLSP1_QUP_BASE 0x078B5000
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#define I2C_PORT_ID(reg) ((reg - BLSP1_QUP_BASE) / GCC_BLSP1_QUP_I2C_OFFSET_INC)
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#define GCC_BLSP1_QUP_I2C_OFFSET_INC 0x1000
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#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_SEL (1 << 8)
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#define GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR_SRC_DIV (0x1F << 0)
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#define GCC_BLSP1_QUP_I2C_APPS_CMD_RCGR(id) ((id < 1) ? \
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(GCC_BLSP1_QUP1_I2C_APPS_CMD_RCGR):\
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(GCC_BLSP1_QUP2_I2C_APPS_CMD_RCGR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * (id-1))))
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#define GCC_BLSP1_QUP_I2C_APPS_CFG_RCGR(id) ((id < 1) ? \
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(GCC_BLSP1_QUP1_I2C_APPS_CFG_RCGR):\
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(GCC_BLSP1_QUP2_I2C_APPS_CFG_RCGR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * (id-1))))
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#define GCC_BLSP1_QUP_I2C_APPS_CBCR(id) ((id < 1) ? \
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(GCC_BLSP1_QUP1_I2C_APPS_CBCR):\
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(GCC_BLSP1_QUP2_I2C_APPS_CBCR + (GCC_BLSP1_QUP_I2C_OFFSET_INC * (id-1))))
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#define CMD_UPDATE 0x1
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#define ROOT_EN 0x2
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#define CLK_ENABLE 0x1
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void i2c_clock_config(void);
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#endif
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#endif /*CLK_H*/
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