From 698a7e98e0877ec5779d4ba4defeca5e7ab4e505 Mon Sep 17 00:00:00 2001 From: Abhishek Sahu Date: Tue, 7 Nov 2017 14:27:20 +0530 Subject: [PATCH] mtd: nand: qcom: store the number of spare, ecc and bbm bytes This patch does minor code reorganization to store spare, ecc and bbm bytes in nand device structure which will be useful in subsequent patches. Change-Id: Id44c53e204a874569968764798c346a609695acf Signed-off-by: Abhishek Sahu --- .../include/asm/arch-qca-common/qpic_nand.h | 3 ++ drivers/mtd/nand/qpic_nand.c | 38 +++++++++---------- 2 files changed, 21 insertions(+), 20 deletions(-) diff --git a/arch/arm/include/asm/arch-qca-common/qpic_nand.h b/arch/arm/include/asm/arch-qca-common/qpic_nand.h index 3ec31a2cfd..0e10757ce6 100644 --- a/arch/arm/include/asm/arch-qca-common/qpic_nand.h +++ b/arch/arm/include/asm/arch-qca-common/qpic_nand.h @@ -430,6 +430,9 @@ struct qpic_nand_dev { unsigned cw_size; unsigned cws_per_page; unsigned bad_blk_loc; + unsigned ecc_bytes_hw; + unsigned spare_bytes; + unsigned bbm_size; unsigned dev_cfg; uint32_t cfg0; uint32_t cfg1; diff --git a/drivers/mtd/nand/qpic_nand.c b/drivers/mtd/nand/qpic_nand.c index 7534ba8bd7..d26cdab12c 100644 --- a/drivers/mtd/nand/qpic_nand.c +++ b/drivers/mtd/nand/qpic_nand.c @@ -636,35 +636,33 @@ qpic_nand_save_config(struct mtd_info *mtd) dev->ecc_bch_cfg |= (1 << NAND_DEV0_ECC_MODE_SHIFT); if (dev->widebus) { - /* spare size bytes in each CW */ - dev->cfg0 |= (0 << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT); - /* parity bytes in each CW */ - dev->ecc_bch_cfg |= (14 << - NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT); + dev->ecc_bytes_hw = 14; + dev->spare_bytes = 0; + dev->bbm_size = 2; } else { - /* spare size bytes in each CW */ - dev->cfg0 |= (2 << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT); - /* parity bytes in each CW */ - dev->ecc_bch_cfg |= (13 << - NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT); + dev->ecc_bytes_hw = 13; + dev->spare_bytes = 2; + dev->bbm_size = 1; } } else { dev->cw_size = NAND_CW_SIZE_4_BIT_ECC; if (dev->widebus) { - /* spare size bytes in each CW */ - dev->cfg0 |= (2 << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT); - /* parity bytes in each CW */ - dev->ecc_bch_cfg |= (8 << - NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT); + dev->ecc_bytes_hw = 8; + dev->spare_bytes = 2; + dev->bbm_size = 2; } else { - /* spare size bytes in each CW */ - dev->cfg0 |= (4 << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT); - /* parity bytes in each CW */ - dev->ecc_bch_cfg |= (7 << - NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT); + dev->ecc_bytes_hw = 7; + dev->spare_bytes = 4; + dev->bbm_size = 1; } } + /* spare size bytes in each CW */ + dev->cfg0 |= dev->spare_bytes << NAND_DEV0_CFG0_SPARE_SZ_BYTES_SHIFT; + /* parity bytes in each CW */ + dev->ecc_bch_cfg |= + dev->ecc_bytes_hw << NAND_DEV0_ECC_PARITY_SZ_BYTES_SHIFT; + qpic_oob_size = dev->cw_size * dev->cws_per_page - mtd->writesize; if (mtd->oobsize < qpic_oob_size) {