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board: qca: ipq5018: Remove GCC_SDCC1_MISC register.
This change will remove GCC_SDCC1_MISC register from SDCC clock configuration code path. Since in ipq5018 this register is not available. so removining this register. Signed-off-by: Md Sadre Alam <mdalam@codeaurora.org> Change-Id: I980fc0f0ce24cd0da5610300608a5dd223c33941
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parent
7778ef70b9
commit
63d0c33622
2 changed files with 9 additions and 13 deletions
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@ -259,6 +259,10 @@ void emmc_clock_config(void)
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/* Delay for clock operation complete */
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udelay(10);
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writel(0x1, GCC_SDCC1_APPS_M);
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/* check this M, N D value while debugging
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* because as per clock tool the actual M, N, D
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* values are M=1, N=FA, D=F9
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*/
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writel(0xFC, GCC_SDCC1_APPS_N);
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writel(0xFD, GCC_SDCC1_APPS_D);
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/* Delay for clock operation complete */
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@ -286,15 +290,12 @@ void sdhci_bus_pwr_off(struct sdhci_host *host)
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sdhci_writeb(host,(val & (~SDHCI_POWER_ON)), SDHCI_POWER_CONTROL);
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}
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void emmc_clock_disable(void)
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__weak void board_mmc_deinit(void)
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{
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/* Clear divider */
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writel(0x0, GCC_SDCC1_MISC);
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}
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void board_mmc_deinit(void)
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{
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emmc_clock_disable();
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/*since we do not have misc register in ipq5018
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* so simply return from this function
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*/
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return;
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}
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void emmc_clock_reset(void)
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@ -325,7 +326,6 @@ int board_mmc_init(bd_t *bis)
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mmc_host.cfg.part_type = PART_TYPE_EFI;
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mmc_host.quirks = SDHCI_QUIRK_BROKEN_VOLTAGE;
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emmc_clock_disable();
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emmc_clock_reset();
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udelay(10);
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emmc_clock_config();
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@ -99,7 +99,6 @@
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#define GCC_SDCC1_APPS_D 0x01842014
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#define GCC_SDCC1_APPS_CBCR 0x01842018
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#define GCC_SDCC1_AHB_CBCR 0x0184201C
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#define GCC_SDCC1_MISC 0x01842020
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/*
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* GCC-QPIC Registers
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@ -142,9 +141,6 @@
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#define GCC_BLSP1_UART2_APPS_N 0x01803040
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#define GCC_BLSP1_UART2_APPS_D 0x01803044
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#define GCC_SDCC1_BCR 0x01842000
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#define GCC_UART_CFG_RCGR_MODE_MASK 0x3000
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#define GCC_UART_CFG_RCGR_SRCSEL_MASK 0x0700
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#define GCC_UART_CFG_RCGR_SRCDIV_MASK 0x001F
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