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board: qca: arm: remove MEM_NOC clock access

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Since only Q6/TME/TZ should have access to memnoc clock,
so removing the MEMNOC clock enable sequence.

Change-Id: Iee32a59c340cda794b8ee3c314be871ab749ff79
Signed-off-by: Ram Kumar D <quic_ramd@quicinc.com>
This commit is contained in:
Ram Kumar D 2023-09-08 16:36:25 +05:30
parent 4879ecbe49
commit 43b55089db
2 changed files with 0 additions and 5 deletions
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1
arch/arm/include/asm/arch-ipq5332/clk.h
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@ -155,7 +155,6 @@
#define GCC_NSSNOC_SNOC_CBCR 0x01817028
#define GCC_NSSCFG_CLK 0x0181702C
#define GCC_NSSNOC_SNOC_1_CBCR 0x0181707C
#define GCC_MEM_NOC_SNOC_AXI_CBCR 0x01819018
#define GCC_CMN_BLK_ADDR 0x0183A000
#define GCC_CMN_BLK_AHB_CBCR_OFFSET 0x4
#define GCC_CMN_BLK_SYS_CBCR_OFFSET 0x8

4
board/qca/arm/ipq5332/clock.c
View file

@ -542,10 +542,6 @@ void noc_clock_init(void)
reg_val = readl(GCC_NSSNOC_SNOC_1_CBCR);
writel(reg_val | GCC_CBCR_CLK_ENABLE, GCC_NSSNOC_SNOC_1_CBCR);
reg_val = readl(GCC_MEM_NOC_SNOC_AXI_CBCR);
writel(reg_val | GCC_CBCR_CLK_ENABLE, GCC_MEM_NOC_SNOC_AXI_CBCR);
}
void uniphy_clock_enable(enum uniphy_clk_type clk_type, bool enable)