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board: arm: ipq5332: update pcie deinit sequence

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This changes remove pci phy deinit sequence and
also update the pci phy address

Change-Id: I9bae09958e395dfb509a17e472674f33fe214f1c
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This commit is contained in:
Vandhiadevan Karunamoorthy 2022-10-09 22:05:51 +05:30
parent 95e16ef259
commit 35d9c9f36a
3 changed files with 15 additions and 19 deletions
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6
arch/arm/dts/ipq5332-soc.dtsi
View file

@ -69,7 +69,7 @@
0x20300000 0xd00000
0x20100000 0x100000
0x1829000 0x60
0x8c000 0x1000>;
0x4B0000 0x800>;
reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
"axi_conf", "pci_rst", "pci_phy";
gen3 = <1>;
@ -88,7 +88,7 @@
0x18300000 0xd00000
0x18100000 0x100000
0x1828000 0x60
0xF4000 0x1000>;
0x4B1000 0x1000>;
reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
"axi_conf", "pci_rst", "pci_phy";
gen3 = <1>;
@ -107,7 +107,7 @@
0x10300000 0xd00000
0x10100000 0x100000
0x182A000 0x60
0xFC000 0x1000>;
0x4B1800 0x800>;
reg-names = "pci_dbi", "parf", "elbi","dm_iatu", "axi_bars",
"axi_conf", "pci_rst", "pci_phy";
gen3 = <1>;

23
board/qca/arm/ipq5332/ipq5332.c
View file

@ -443,10 +443,9 @@ void board_pci_init(int id)
void board_pci_deinit()
{
int node, gpio_node, i, err, is_x2;
int node, gpio_node, i, err;
char name[16];
struct fdt_resource parf;
struct fdt_resource pci_phy;
for (i = 0; i < PCI_MAX_DEVICES; i++) {
snprintf(name, sizeof(name), "pci%d", i);
@ -457,22 +456,14 @@ void board_pci_deinit()
}
err = fdt_get_named_resource(gd->fdt_blob, node, "reg",
"reg-names", "parf", &parf);
writel(0x0, parf.start + 0x358);
writel(0x1, parf.start + 0x40);
err = fdt_get_named_resource(gd->fdt_blob, node, "reg",
"reg-names", "pci_phy", &pci_phy);
if (err < 0)
if (err < 0) {
printf("Unable to find parf node for PCIE%d \n", i);
continue;
}
if ((i == 0) || (i == 1))
is_x2 = 0;
else
is_x2 = 1;
writel(0x1, pci_phy.start + (0x800 + (0x800 * is_x2)));
writel(0x0, pci_phy.start + (0x804 + (0x800 * is_x2)));
writel(0x0, parf.start + PCIE_PARF_SLV_ADDR_SPACE_SIZE);
writel(PCIE_PHY_TEST_PWR_DOWN,
parf.start + PCIE_PARF_PHY_CTRL);
gpio_node = fdt_subnode_offset(gd->fdt_blob, node, "pci_gpio");
if (gpio_node >= 0)

5
board/qca/arm/ipq5332/ipq5332.h
View file

@ -144,6 +144,11 @@ enum pcie_port_lane_mode_t{
#define PCIE_1_CLOCK_DISABLE_BIT 12
#define PCIE_2_CLOCK_DISABLE_BIT 10
#define PCIE_PARF_SLV_ADDR_SPACE_SIZE 0x358
#define PCIE_PARF_PHY_CTRL 0x40
#define PCIE_PHY_TEST_PWR_DOWN 0x1
/*
* GPIO functional configs
*/