ipq5018: Fix usb hsphy clock

It will resolve usb probe failure in hs phy
without ss phy. It enables utmi clock instead
of pipe clock in hs phy only configuration.

Change-Id: Idaf140d2cbe068304f1ce87c443c8e2196e3433e
Signed-off-by: Manikanta Mylavarapu <mmanikan@codeaurora.org>
This commit is contained in:
Manikanta Mylavarapu 2020-12-07 14:24:54 +05:30
parent 1a756e2b23
commit 33024894ca
2 changed files with 18 additions and 2 deletions

View file

@ -1409,8 +1409,20 @@ static void usb_clock_init(int id, int ssphy)
writel(CLK_ENABLE, GCC_USB0_LFPS_CBCR);
}
static void usb_init_hsphy(void __iomem *phybase)
static void usb_init_hsphy(void __iomem *phybase, int ssphy)
{
if (!ssphy) {
/*Enable utmi instead of pipe*/
writel((readl(USB30_GENERAL_CFG) | PIPE_UTMI_CLK_DIS), USB30_GENERAL_CFG);
udelay(100);
writel((readl(USB30_GENERAL_CFG) | PIPE_UTMI_CLK_SEL | PIPE3_PHYSTATUS_SW), USB30_GENERAL_CFG);
udelay(100);
writel((readl(USB30_GENERAL_CFG) & ~PIPE_UTMI_CLK_DIS), USB30_GENERAL_CFG);
}
/* Disable USB PHY Power down */
setbits_le32(phybase + 0xA4, 0x1);
/* Enable override ctrl */
@ -1480,7 +1492,7 @@ static void usb_init_phy(int index, int ssphy)
if (ssphy)
usb_init_ssphy((u32 *)USB3PHY_APB_BASE);
usb_init_hsphy((u32 *)QUSB2PHY_BASE);
usb_init_hsphy((u32 *)QUSB2PHY_BASE, ssphy);
}
int ipq_board_usb_init(void)

View file

@ -234,6 +234,10 @@
#define GUCTL 0x700C12C
#define FLADJ 0x700C630
#define PIPE_UTMI_CLK_SEL 0x1
#define PIPE3_PHYSTATUS_SW (0x1 << 3)
#define PIPE_UTMI_CLK_DIS (0x1 << 8)
#define QUSB2PHY_BASE 0x5b000
#define GCC_USB0_LFPS_CFG_SRC_SEL (0x1 << 8)