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ipq5018: Fix usb hsphy clock
It will resolve usb probe failure in hs phy without ss phy. It enables utmi clock instead of pipe clock in hs phy only configuration. Change-Id: Idaf140d2cbe068304f1ce87c443c8e2196e3433e Signed-off-by: Manikanta Mylavarapu <mmanikan@codeaurora.org>
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parent
1a756e2b23
commit
33024894ca
2 changed files with 18 additions and 2 deletions
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@ -1409,8 +1409,20 @@ static void usb_clock_init(int id, int ssphy)
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writel(CLK_ENABLE, GCC_USB0_LFPS_CBCR);
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}
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static void usb_init_hsphy(void __iomem *phybase)
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static void usb_init_hsphy(void __iomem *phybase, int ssphy)
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{
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if (!ssphy) {
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/*Enable utmi instead of pipe*/
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writel((readl(USB30_GENERAL_CFG) | PIPE_UTMI_CLK_DIS), USB30_GENERAL_CFG);
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udelay(100);
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writel((readl(USB30_GENERAL_CFG) | PIPE_UTMI_CLK_SEL | PIPE3_PHYSTATUS_SW), USB30_GENERAL_CFG);
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udelay(100);
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writel((readl(USB30_GENERAL_CFG) & ~PIPE_UTMI_CLK_DIS), USB30_GENERAL_CFG);
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}
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/* Disable USB PHY Power down */
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setbits_le32(phybase + 0xA4, 0x1);
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/* Enable override ctrl */
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@ -1480,7 +1492,7 @@ static void usb_init_phy(int index, int ssphy)
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if (ssphy)
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usb_init_ssphy((u32 *)USB3PHY_APB_BASE);
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usb_init_hsphy((u32 *)QUSB2PHY_BASE);
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usb_init_hsphy((u32 *)QUSB2PHY_BASE, ssphy);
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}
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int ipq_board_usb_init(void)
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@ -234,6 +234,10 @@
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#define GUCTL 0x700C12C
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#define FLADJ 0x700C630
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#define PIPE_UTMI_CLK_SEL 0x1
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#define PIPE3_PHYSTATUS_SW (0x1 << 3)
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#define PIPE_UTMI_CLK_DIS (0x1 << 8)
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#define QUSB2PHY_BASE 0x5b000
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#define GCC_USB0_LFPS_CFG_SRC_SEL (0x1 << 8)
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