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ipq807x: added support for HK10 external reference clk select.

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By default UNIPHY PLL takes 48MHz, now this need to take  50M
from external oscilator input pin for HK10. So need to change
the PLL ref sel.

Affected only for HK10. Tested on Reworked HK01 board with 50MHz
oscillator connected to USGMII_OSCILL_50M pin

Change-Id: Ie90fdbbfbfc700a30d9ada895baa1a170db25888
Signed-off-by: Tushar Nimkar <tnimkar@codeaurora.org>
This commit is contained in:
Tushar Nimkar 2019-09-06 15:56:52 +05:30
parent 5f8ed3222a
commit 0206407f5f
3 changed files with 28 additions and 1 deletions
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1
arch/arm/dts/ipq807x-hk10.dts
View file

@ -31,6 +31,7 @@
switch_mac_mode2 = <0x6>;
napa_gpio = <25 44>;
napa_gpio_cnt = <2>;
uniphy_ext_ref_clk;
port_phyinfo {
port@0 {
phy_address = <0>;

18
board/qca/arm/ipq807x/ipq807x.c
View file

@ -424,7 +424,20 @@ void aquantia_phy_reset_init_done(void)
gpio_set_value(aquantia_gpio, 0x1);
}
}
void check_uniphy_ext_ref_clk(void)
{
int node;
node = fdt_path_offset(gd->fdt_blob, "/ess-switch");
if (node >= 0) {
if(fdtdec_get_bool(gd->fdt_blob, node, "uniphy_ext_ref_clk")){
printf("External ref clk setting found... \n");
writel(PLL_REF_CLKSEL_50M, PLL_REFERENCE_CLOCK); /*0x8218 - 50M 0x8017 - 48M(default)*/
writel(ANA_EN_SW_RSTN_DIS, PLL_POWER_ON_AND_RESET); /*give reset*/
mdelay(1);
writel(ANA_EN_SW_RSTN_EN, PLL_POWER_ON_AND_RESET);
}
}
}
void eth_clock_enable(void)
{
int tlmm_base = 0x1025000;
@ -482,6 +495,9 @@ void eth_clock_enable(void)
* these clk init will be moved to sbl later
*/
/*this is for ext oscillator clk for ref clk-*/
check_uniphy_ext_ref_clk();
/* bring phy out of reset */
writel(7, tlmm_base + 0x1f000);
writel(7, tlmm_base + 0x20000);

10
board/qca/arm/ipq807x/ipq807x.h
View file

@ -232,6 +232,16 @@
#define ARM_PSCI_TZ_FN_CPU_ON ARM_PSCI_TZ_FN(3)
#define ARM_PSCI_TZ_FN_AFFINITY_INFO ARM_PSCI_TZ_FN(4)
/*CMN BLOCK REG*/
#define PLL_REFERENCE_CLOCK 0x0009B784
#define PLL_POWER_ON_AND_RESET 0x0009B780
/*0x8218 - 50M 0x8017 - 48M(default)*/
#define PLL_REF_CLKSEL_50M 0x8218
#define ANA_EN_SW_RSTN_DIS 0xBF
#define ANA_EN_SW_RSTN_EN 0xFF
unsigned int __invoke_psci_fn_smc(unsigned int, unsigned int,
unsigned int, unsigned int);