board: devsoc: enable dcache

This changes enable dcache enable and disable support
and also enable dcache command.

Change-Id: I7a11a923c1f87168e9cb519c5dedfcfac2dbc610
Signed-off-by: Vandhiadevan Karunamoorthy <quic_vkarunam@quicinc.com>
This commit is contained in:
Vandhiadevan Karunamoorthy 2022-04-26 11:51:09 +05:30 committed by Gerrit - the friendly Code Review server
parent 0cdbe1f6d1
commit 018618939e
2 changed files with 11 additions and 1 deletions

View file

@ -143,12 +143,22 @@ void board_nand_init(void)
void enable_caches(void)
{
qca_smem_flash_info_t *sfi = &qca_smem_flash_info;
smem_get_boot_flash(&sfi->flash_type,
&sfi->flash_index,
&sfi->flash_chip_select,
&sfi->flash_block_size,
&sfi->flash_density);
icache_enable();
/*Skips dcache_enable during JTAG recovery */
if (sfi->flash_type)
dcache_enable();
}
void disable_caches(void)
{
icache_disable();
dcache_disable();
}
unsigned long timer_read_counter(void)

View file

@ -24,7 +24,6 @@
#undef CONFIG_QCA_DISABLE_SCM
#define CONFIG_SPI_FLASH_CYPRESS
#define CONFIG_SYS_NO_FLASH
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_IPQ_NO_RELOC
#define CONFIG_SYS_VSNPRINTF
@ -213,6 +212,7 @@ extern loff_t board_env_size;
* Cache flush and invalidation based on L1 cache, so the cache line
* size is configured to 64 */
#define CONFIG_SYS_CACHELINE_SIZE 64
#define CONFIG_CMD_CACHE
/*
* SPI Flash Configs