initvals: update checksums.txt

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
This commit is contained in:
Luis R. Rodriguez 2010-11-19 09:29:23 -08:00
parent 9d258324a5
commit 6d53adab8c

View file

@ -68,41 +68,21 @@
0x00000000acddbca0 ar9271Modes_9271_ANI_reg
0x000000005e37c1cf ar9271Modes_normal_power_tx_gain_9271
0x0000000096049828 ar9271Modes_high_power_tx_gain_9271
0x000000004a488fc7 ar9300_2p0_radio_postamble
0x0000000091bf70ea ar9300Modes_lowest_ob_db_tx_gain_table_2p0
0x00000000f6e26c1f ar9300Modes_fast_clock_2p0
0x0000000037ac0ee8 ar9300_2p0_radio_core
0x00000000047a7700 ar9300Common_rx_gain_table_merlin_2p0
0x0000000003f783bb ar9300_2p0_mac_postamble
0x00000000301fc841 ar9300_2p0_soc_postamble
0x000000005ec8075f ar9200_merlin_2p0_radio_core
0x000000009fb0b767 ar9300_2p0_baseband_postamble
0x00000000b57ba74f ar9300_2p0_baseband_core
0x00000000e932a418 ar9300Modes_high_power_tx_gain_table_2p0
0x00000000c834a2da ar9300Modes_high_ob_db_tx_gain_table_2p0
0x000000003a326c00 ar9300Common_rx_gain_table_2p0
0x00000000dff770ea ar9300Modes_low_ob_db_tx_gain_table_2p0
0x00000000d974fd78 ar9300_2p0_mac_core
0x000000003521a300 ar9300Common_wo_xlna_rx_gain_table_2p0
0x00000000a1313043 ar9300_2p0_soc_preamble
0x0000000029734396 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0
0x000000002d834396 ar9300PciePhy_clkreq_enable_L1_2p0
0x0000000029834396 ar9300PciePhy_clkreq_disable_L1_2p0
0x000000004a488fc7 ar9300_2p2_radio_postamble
0x00000000173f70ea ar9300Modes_lowest_ob_db_tx_gain_table_2p2
0x00000000f6e26c1f ar9300Modes_fast_clock_2p2
0x0000000046cb1300 ar9300Modes_lowest_ob_db_tx_gain_table_2p2
0x00000000e912711f ar9300Modes_fast_clock_2p2
0x0000000037ac0ee8 ar9300_2p2_radio_core
0x00000000047a7700 ar9300Common_rx_gain_table_merlin_2p2
0x0000000003f783bb ar9300_2p2_mac_postamble
0x00000000301fc841 ar9300_2p2_soc_postamble
0x000000005ec8075f ar9200_merlin_2p2_radio_core
0x00000000864f96b2 ar9300_2p2_baseband_postamble
0x00000000b31bdec3 ar9300_2p2_baseband_core
0x00000000e932a418 ar9300Modes_high_power_tx_gain_table_2p2
0x00000000c834a2da ar9300Modes_high_ob_db_tx_gain_table_2p2
0x000000003a326c00 ar9300Common_rx_gain_table_2p2
0x00000000133f70ea ar9300Modes_low_ob_db_tx_gain_table_2p2
0x00000000b974fd78 ar9300_2p2_mac_core
0x0000000083372ffa ar9300_2p2_baseband_postamble
0x00000000c4f59974 ar9300_2p2_baseband_core
0x00000000e20d2e72 ar9300Modes_high_power_tx_gain_table_2p2
0x000000007fd55c70 ar9300Modes_high_ob_db_tx_gain_table_2p2
0x0000000029495000 ar9300Common_rx_gain_table_2p2
0x0000000042cb1300 ar9300Modes_low_ob_db_tx_gain_table_2p2
0x00000000c4739cd6 ar9300_2p2_mac_core
0x000000003521a300 ar9300Common_wo_xlna_rx_gain_table_2p2
0x00000000a15ccf1b ar9300_2p2_soc_preamble
0x0000000029734396 ar9300PciePhy_pll_on_clkreq_disable_L1_2p2