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initvals: remove AR9003 2.0 initvals

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This is due to the patch upstream:

commit 886b42bf5e54098061c8bae3d5e292a8b6897401
Author: Luis R. Rodriguez <lrodriguez@atheros.com>
Date:   Thu Oct 14 11:44:27 2010 -0700

    ath9k_hw: remove AR9003 2.0 support

    These chipsets will not hit the market, all customers will be
    on >= AR9003 2.2. This shaves down the ath9k_hw size by
    24161 bytes (24 KB) on my system.

    Before:

    $ size drivers/net/wireless/ath/ath9k/ath9k_hw.ko
       text        data     bss     dec     hex filename
     292328         616    1824  294768   47f70 drivers/net/wireless/ath/ath9k/ath9k_hw.ko

    $ du -b drivers/net/wireless/ath/ath9k/ath9k_hw.ko
    5987825     drivers/net/wireless/ath/ath9k/ath9k_hw.ko

    After:

    $ size drivers/net/wireless/ath/ath9k/ath9k_hw.ko
       text        data     bss     dec     hex filename
     277192         616    1824  279632   44450 drivers/net/wireless/ath/ath9k/ath9k_hw.ko

    $ du -b drivers/net/wireless/ath/ath9k/ath9k_hw.ko
    5963664     drivers/net/wireless/ath/ath9k/ath9k_hw.ko

    Cc: Yixiang Li <yixiang.li@atheros.com>
    Cc: Don Breslin <don.breslin@atheros.com>
    Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
    Signed-off-by: John W. Linville <linville@tuxdriver.com>

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
This commit is contained in:
Luis R. Rodriguez 2010-11-19 09:27:37 -08:00
parent 3f06b988f9
commit 9d258324a5
3 changed files with 3 additions and 1876 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
Makefile
View file

@ -13,7 +13,7 @@ ATHEROS_DEPS += \
ar9300_osprey22.ini
endif
initvals: ar5008_initvals.h ar9001_initvals.h ar9002_initvals.h ar9003_2p0_initvals.h ar9003_2p2_initvals.h $(ATHEROS_DEPS) initvals.c
initvals: ar5008_initvals.h ar9001_initvals.h ar9002_initvals.h ar9003_2p2_initvals.h $(ATHEROS_DEPS) initvals.c
gcc $(CFLAGS) -o $@ $@.c
all: initvals

1784
ar9003_2p0_initvals.h
View file

File diff suppressed because it is too large Load diff

93
initvals.c
View file

@ -19,7 +19,6 @@ typedef long long unsigned int u64;
#include "ar5008_initvals.h"
#include "ar9001_initvals.h"
#include "ar9002_initvals.h"
#include "ar9003_2p0_initvals.h"
#include "ar9003_2p2_initvals.h"
#else
@ -133,30 +132,6 @@ typedef long long unsigned int u64;
/* This is what these are called on the Atheros HAL */
/* AR9003 2.0 */
#define ar9300_osprey_2p0_radio_postamble ar9300_2p0_radio_postamble
#define ar9300Modes_lowest_ob_db_tx_gain_table_osprey_2p0 ar9300Modes_lowest_ob_db_tx_gain_table_2p0
#define ar9300Modes_fast_clock_osprey_2p0 ar9300Modes_fast_clock_2p0
#define ar9300_osprey_2p0_radio_core ar9300_2p0_radio_core
#define ar9300Common_rx_gain_table_merlin_2p0 ar9300Common_rx_gain_table_merlin_2p0
#define ar9300_osprey_2p0_mac_postamble ar9300_2p0_mac_postamble
#define ar9300_osprey_2p0_soc_postamble ar9300_2p0_soc_postamble
#define ar9200_merlin_2p0_radio_core ar9200_merlin_2p0_radio_core
#define ar9300_osprey_2p0_baseband_postamble ar9300_2p0_baseband_postamble
#define ar9300_osprey_2p0_baseband_core ar9300_2p0_baseband_core
#define ar9300Modes_high_power_tx_gain_table_osprey_2p0 ar9300Modes_high_power_tx_gain_table_2p0
#define ar9300Modes_high_ob_db_tx_gain_table_osprey_2p0 ar9300Modes_high_ob_db_tx_gain_table_2p0
#define ar9300Common_rx_gain_table_osprey_2p0 ar9300Common_rx_gain_table_2p0
#define ar9300Modes_low_ob_db_tx_gain_table_osprey_2p0 ar9300Modes_low_ob_db_tx_gain_table_2p0
#define ar9300_osprey_2p0_mac_core ar9300_2p0_mac_core
#define ar9300Common_wo_xlna_rx_gain_table_osprey_2p0 ar9300Common_wo_xlna_rx_gain_table_2p0
#define ar9300_osprey_2p0_soc_preamble ar9300_2p0_soc_preamble
#define ar9300PciePhy_pll_on_clkreq_disable_L1_osprey_2p0 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0
#define ar9300PciePhy_clkreq_enable_L1_osprey_2p0 ar9300PciePhy_clkreq_enable_L1_2p0
#define ar9300PciePhy_clkreq_disable_L1_osprey_2p0 ar9300PciePhy_clkreq_disable_L1_2p0
#include "ar9300_osprey20.ini"
/* AR9003 2.2 */
#define ar9300_osprey_2p2_radio_postamble ar9300_2p2_radio_postamble
#define ar9300Modes_lowest_ob_db_tx_gain_table_osprey_2p2 ar9300Modes_lowest_ob_db_tx_gain_table_2p2
@ -401,32 +376,6 @@ static void ar9002_hw_check_initvals(void)
INI_CHECK(ar9271Modes_high_power_tx_gain_9271, 6);
}
static void ar9003_2p0_hw_check_initvals(void)
{
u64 chksum;
INI_CHECK(ar9300_2p0_radio_postamble, 5);
INI_CHECK(ar9300Modes_lowest_ob_db_tx_gain_table_2p0, 5);
INI_CHECK(ar9300Modes_fast_clock_2p0, 3);
INI_CHECK(ar9300_2p0_radio_core, 2);
INI_CHECK(ar9300Common_rx_gain_table_merlin_2p0, 2);
INI_CHECK(ar9300_2p0_mac_postamble, 5);
INI_CHECK(ar9300_2p0_soc_postamble, 5);
INI_CHECK(ar9200_merlin_2p0_radio_core, 2);
INI_CHECK(ar9300_2p0_baseband_postamble, 5);
INI_CHECK(ar9300_2p0_baseband_core, 2);
INI_CHECK(ar9300Modes_high_power_tx_gain_table_2p0, 5);
INI_CHECK(ar9300Modes_high_ob_db_tx_gain_table_2p0, 5);
INI_CHECK(ar9300Common_rx_gain_table_2p0, 2);
INI_CHECK(ar9300Modes_low_ob_db_tx_gain_table_2p0, 5);
INI_CHECK(ar9300_2p0_mac_core, 2);
INI_CHECK(ar9300Common_wo_xlna_rx_gain_table_2p0, 2);
INI_CHECK(ar9300_2p0_soc_preamble, 2);
INI_CHECK(ar9300PciePhy_pll_on_clkreq_disable_L1_2p0, 2);
INI_CHECK(ar9300PciePhy_clkreq_enable_L1_2p0, 2);
INI_CHECK(ar9300PciePhy_clkreq_disable_L1_2p0, 2);
}
static void ar9003_2p2_hw_check_initvals(void)
{
u64 chksum;
@ -541,32 +490,6 @@ static void ar9002_hw_print_initvals(void)
INI_PRINT(ar9271Modes_high_power_tx_gain_9271, 6);
}
static void ar9003_2p0_hw_print_initvals(void)
{
u64 chksum;
INI_PRINT(ar9300_2p0_radio_postamble, 5);
INI_PRINT(ar9300Modes_lowest_ob_db_tx_gain_table_2p0, 5);
INI_PRINT(ar9300Modes_fast_clock_2p0, 3);
INI_PRINT(ar9300_2p0_radio_core, 2);
INI_PRINT(ar9300Common_rx_gain_table_merlin_2p0, 2);
INI_PRINT(ar9300_2p0_mac_postamble, 5);
INI_PRINT(ar9300_2p0_soc_postamble, 5);
INI_PRINT(ar9200_merlin_2p0_radio_core, 2);
INI_PRINT(ar9300_2p0_baseband_postamble, 5);
INI_PRINT(ar9300_2p0_baseband_core, 2);
INI_PRINT(ar9300Modes_high_power_tx_gain_table_2p0, 5);
INI_PRINT(ar9300Modes_high_ob_db_tx_gain_table_2p0, 5);
INI_PRINT(ar9300Common_rx_gain_table_2p0, 2);
INI_PRINT(ar9300Modes_low_ob_db_tx_gain_table_2p0, 5);
INI_PRINT(ar9300_2p0_mac_core, 2);
INI_PRINT(ar9300Common_wo_xlna_rx_gain_table_2p0, 2);
INI_PRINT(ar9300_2p0_soc_preamble, 2);
INI_PRINT(ar9300PciePhy_pll_on_clkreq_disable_L1_2p0, 2);
INI_PRINT(ar9300PciePhy_clkreq_enable_L1_2p0, 2);
INI_PRINT(ar9300PciePhy_clkreq_disable_L1_2p0, 2);
}
static void ar9003_2p2_hw_print_initvals(void)
{
u64 chksum;
@ -595,7 +518,7 @@ static void ar9003_2p2_hw_print_initvals(void)
static void usage()
{
printf("Usage: initvals [-w] [-f ar5008 | ar9001 | ar9002 | ar9003-2p0 | ar9003-2p2]\n");
printf("Usage: initvals [-w] [-f ar5008 | ar9001 | ar9002 | ar9003-2p2]\n");
}
print_initvals_family(char *family)
@ -608,15 +531,7 @@ print_initvals_family(char *family)
ar9001_hw_print_initvals();
else if (strncmp(family, "ar9002", 6) == 0)
ar9002_hw_print_initvals();
else if (strncmp(family, "ar9003-2p0", 10) == 0) {
printf("#ifndef INITVALS_9003_2P0_H\n");
printf("#define INITVALS_9003_2P0_H\n");
printf("\n");
printf("/* AR9003 2.0 */\n");
printf("\n");
ar9003_2p0_hw_print_initvals();
printf("#endif /* INITVALS_9003_2P0_H */\n");
} else if (strncmp(family, "ar9003-2p2", 10) == 0) {
else if (strncmp(family, "ar9003-2p2", 10) == 0) {
printf("#ifndef INITVALS_9003_2P2_H\n");
printf("#define INITVALS_9003_2P2_H\n");
printf("\n");
@ -635,8 +550,6 @@ check_initvals_family(char *family)
ar9001_hw_check_initvals();
else if (strncmp(family, "ar9002", 6) == 0)
ar9002_hw_check_initvals();
else if (strncmp(family, "ar9003-2p0", 10) == 0)
ar9003_2p0_hw_check_initvals();
else if (strncmp(family, "ar9003-2p2", 10) == 0)
ar9003_2p2_hw_check_initvals();
}
@ -652,7 +565,6 @@ int main(int argc, void *argv[])
ar5008_hw_print_initvals();
ar9001_hw_print_initvals();
ar9002_hw_print_initvals();
ar9003_2p0_hw_print_initvals();
ar9003_2p2_hw_print_initvals();
return 0;
@ -679,7 +591,6 @@ int main(int argc, void *argv[])
ar5008_hw_check_initvals();
ar9001_hw_check_initvals();
ar9002_hw_check_initvals();
ar9003_2p0_hw_check_initvals();
ar9003_2p2_hw_check_initvals();
return 0;