The DSA driver must flush the HW FDB when a port changes from
learning/forwarding to disabled/blocking/listening.
But the implementation for RTL931x was writing the port information
starting at bit 11 (bit 11 of the second 32-bit L2_TBL_FLUSH_CTRL
register). But this offset is the AGG_VID and not the port. The actual
position is 43 (bit 11 of the first register).
As result, the FDB was always only flushed for the port 0 and not for the
selected port.
Fixes: 9ed6097054 ("realtek: Add HW support for RTL931X for PIE, L2 and STP aging")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20422
Signed-off-by: Robert Marko <robimarko@gmail.com>
the eth1 interface was renamed to wan so also reflect that change in
the leds setup script
Fixes: f26260c7e7 ("mediatek: filogic: Add label wan and cpu for Zyxel EX5601-T0")
Signed-off-by: Andrew Sim <andrewsimz@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20120
Signed-off-by: Nick Hainke <vincent@systemli.org>
BPDU frames like STP must be processed by each switch (bridge) which
supports STP. It must not be forwarded to avoid confusing the STP state of
other STP participants. It is essential to be an active participant of STP.
The software bridge automatically takes care of forwarding the BPDUs to
other ports when STP is disabled and the hardware switch should not
interfere.
Signed-off-by: Harshal Gohel <hg@simonwunderlich.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20414
Signed-off-by: Robert Marko <robimarko@gmail.com>
With this patch is set the maximum number of connections per ip address instead of no control.
The default is 8.
Signed-off-by: Andrea Pesaresi <andreapesaresi82@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20377
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
backport from kernel 6.12
ksmbd.mount will give each interfaces list and bind_interfaces_only flags
to ksmbd server. Previously, the interfaces list was sent only
when bind_interfaces_only was enabled.
ksmbd server browse only interfaces list given from ksmbd.conf on
FSCTL_QUERY_INTERFACE_INFO IOCTL.
Signed-off-by: Andrea Pesaresi <andreapesaresi82@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20377
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This patch resolves the LAN port not initializing on the
FriendlyElec NanoPI R4S, especially during warm reboots.
Upstream commit patch is based on:
c3fe7071e1
I've experienced the LAN port failing to initialize from a cold boot and
after a reboot. Other users have reported this issue on
https://forum.openwrt.org/t/nanopi-r4s-rk3399-is-a-great-new-openwrt-device/79143.
The NanoPI R4S has its LAN port connected to the RK3399 via PCIE. Since the
PCIE lanes don't initialize correctly after reboot, the LAN port
doesn't initialize.
Signed-off-by: Timothy Feierabend <tim.feierabend@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20406
Signed-off-by: Nick Hainke <vincent@systemli.org>
Now that we have a board file, add calibration variant for TP-Link
Archer C59 v1 and add ipq-wifi package for it.
Tested-by: Mateusz Jończyk <matjon@users.noreply.github.com>
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20401
Signed-off-by: Robert Marko <robimarko@gmail.com>
Commit 468975a985 changed the XO board clock definition from a fixed
clock to a fixed rate clock in the dtsi.
As such, boards must use clock dividers and multipliers to calculate
the clock rate based on the referenced parent clock.
Fixes: 5d2994a73e ("qualcommax: ipq50xx: Add support for Yuncore AX850")
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20405
Signed-off-by: Robert Marko <robimarko@gmail.com>
Fix a regression introduced by a recent commit.
It looks like a copy/paste error.
Add the missing line which defines the 'board' val
as it does not exist otherwise in the case check.
This fixes sysupgrade on ath79 MikroTik non-NOR boards.
Fixes: 318f07c231 ("ath79: mikrotik: check RouterBOOT version matching sysupgrade image")
Signed-off-by: Koen Vandeputte <koen.vandeputte@citymesh.com>
Add pending patch to address PCI sysfs creation entry race observed on
ipq806x. This is to handle a kernel warning on creating the same sysfs
entry multiple times.
All affected patch automatically refreshed.
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Adapt OPP patch with upstream changes to cpufreq driver. Use the krait
compatible and the new opp-supported-hw way instead of deleting nodes.
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The 6.12 testing kernel for ipq806x target is ready now.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
- Reuse the bridges node defined on "qcom-ipq8064.dtsi".
- Rename PCIe device nodes to unified "wifi@0,0".
- Add the missing "qcom,ath10k" compatibles.
- Remove unseless property "interrupt-controller". There are no
consumers use these PCIe devices as interrupt controllers.
- Change bus number from 0 to 1, just like other ipq806x devices.
The valid PCIe bus range on this platform is 1 - 255.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Add bridge node labels so that we can insert PCIe peripheral nodes.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Copy patches and kernel configs from 6.12 kernel to restore the
default 6.6 kernel support files.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This is a preparation for 6.12 kernel support. It can help us
track the patches and Kconfig history by using the Git tool.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This is a preparation for introducing the 6.12 kernel support.
All configs are automatically refreshed. In theory, they will
generate the same .config files in the kernel build directory
as before.
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/18989
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Right now the phylink capability function enables 2.5G and 10G modes on
Maple and Cypress, which they mostly (other than two SERDES on Cypress)
don't support. This causes these modes to be selected and break the link
as they are not supported by hardware.
I looked into doing this properly, but it cannot just be done based on
SoC, but needs to take the whole topology into account as a given MAC
might have very different capabilities depending on what SERDES are
assigned to it. So for now just use 1G and QSGMII for RTL83xx and 10G
for RTL93xx. This mostly works, except it will downgrade some 10G links
on RTL839x, but since there are also 1G SFPs on these this cannot be
solved without fully accounting for the global MAC and SERDES
configuration.
So this makes all of the 1G SFP slots work again, while keeping most of
the 10G SFP+ slots working at 10G with minimal changes.
Signed-off-by: Lorenz Brun <lorenz@brun.one>
Link: https://github.com/openwrt/openwrt/pull/20374
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If the devicetree contains the appropriate nodes to configure the MAC
addresses for each physical DSA port, then these MAC addresses must be used
in OpenWrt and not some automatically generated ones. Otherwise the device
often ends up with addresses which are locally administered and not
matching any expected port-to-MAC scheme.
Devices which only get the MAC address for eth0 must still auto-generate
these MAC addresses until the devicetree was updated to also include the
correct ones.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
If the lan_mac cannot be found, it is still used (as empty string) in
various operations. This is not valid and other 02_network scripts checking
for a non-empty string before using it. This should also be adopted for the
realtek 02_network.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Having everything in a big script without any structure makes it
unnecessary hard to get an overview or modify it without triggering
unexpected side effects.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20241
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The preferred prefix for the Realtek DSA driver code is "rtldsa" and no
longer "rtl83xx". This makes sure that the different drivers have
non-conflicting prefixes and because of this non-conflicting function
names.
Suggested-by: Felix Baumann <felix.bau@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The RTL930x and the RTL931x SoC families share the same struct
dsa_switch_ops. This should be represented in the name of the object.
Suggested-by: Felix Baumann <felix.bau@gmx.de>
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
If two ports are in isolation mode then these ports are not supposed to be
able to communicate between each other. This can be achieved in the realtek
switch by removing the other isolated port(s) from the port list of an
isolated port.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The realtek driver is now in full control of the port matrix. It doesn't
need to rely on the current state of the HW to adjust it. The new port
matrix is calculated automatically using rtldsa_update_port_member() and
then written to the registers/tables.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
It is not necessary to read the back the current port members for a
specific port for enabling/disabling a port. All these members which are
expected to be in the HW port matrix of an active port are already stored
in the port specific member "pm".
And when a port is disabled, the port must no longer forwarding traffic to
any other port. Just writing 0 to the members is therefore good enough and
no read-back of the old HW state is necessary.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
The leave and join callbacks for DSA were using their own implementation of
the port member handling code. This makes the implementation of additional
functionality based on the port member matrix complicated because it needs
to be implemented in both places and also in the new code path for the
introduced feature.
By sharing this code, it is much easier to guarantee that all code paths
behave the same. This approach is already implemented by other DSA drivers
like qca8k, mt7530 or ksz.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20360
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add a callback for a serdes setup function to rtpcs_cfg to allow each
SoC variant to define its own SerDes setup routine.
Call the setup_serdes operation in pcs_config if it is defined.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20352
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add more SerDes access helpers for the upcoming code import from PHY
driver. There, similar helpers are used to read and write full SerDes
registers or only parts of them (aka bitfields).
The helpers are expected to replace the following used in PHY SerDes
code:
- rtl9300_sds_field_r
- rtl9300_sds_field_w
- rtsds_931x_read
- rtsds_931x_read_field
- rtsds_931x_write
- rtsds_931x_write_field
Mark the helpers as unused for now to make the compiler happy. This will
be removed as soon as they are used.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20352
Signed-off-by: Robert Marko <robimarko@gmail.com>
This driver is required for the serial port on headless embedded AMD Ryzen
Embedded V3000 devices such as the SolidRun BEDROCK V3000.
Signed-off-by: Patrick Oppenlander <patrick.oppenlander@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20353
Signed-off-by: Robert Marko <robimarko@gmail.com>
There are two spi drivers for en7523/an7581/an7583:
* en7581-snand (spi-airoha-snfi.c)
* en7523-spi (spi-en7523.c)
The first one supports DMA, but until recently it has several nasty
issues. The second do things properly but does not support DMA.
Recently the first driver was greatly improved, so there is no sence
keep both drivers anymore.
This patch removes en7523-spi driver and use DMA capable driver instead.
Unfortunately there is a nasty en7523 specific issue.
We found that some serial console may pull TX line to GROUND during board
boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
to booting in RESERVED boot mode. It was found that some flashes operates
incorrectly in RESERVED mode if DMA used.
This patch also adds a hack that turns off DMA and prints big fat warning
if booting in reserved mode was detected. This slow down flash operations
but does not kill your data.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20365
Signed-off-by: Robert Marko <robimarko@gmail.com>
This allows us use more easily port en7581 drivers to en7523.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20365
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch series removes dirty hack that reads flash page settings from
SNFI registers during driver startup.
Before these patches the airoha spi snfi driver needs to know spinand
flash page size. The driver can't get it from spinand subsystem, so the
following approach was implemented:
* bootloader know the flash page size (and some other parameters)
* to operate properly the bootloader writes flash page size (and some
other parameters) to SNFI registers
* bootloader starts linux
* after linux start SNFI registers keeps the values stored by bootloader
* linux snfi driver reads flash parameters from SNFI registers.
This works, but we can do better. It has been proven that flash page size
is actually unnecessary. We can get all required data from dirmap requests.
This patch series drops the hack and do things properly.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
This patch series greatly improve airoha snfi driver and fix a
number of serious bugs.
Fixed bugs:
* Fix reading/writing of flashes with more than one plane per lun
* Fill the buffer with 0xff before writing
* Fix reading of flashes supporting continuous reading mode
* Fix error paths
Improvements:
* Add support of dual/quad wires spi modes in exec_op(). This also
fix flash reading/writing if dirmap can't be created.
* Support of dualio/quadio flash reading commands
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
Continuous reading mode is broken for some spi controllers. There are two
possible bug scenarios:
1) "continuous mode" flash and spi controller without dirmap support,
but with restriction on transfer length in adjust_op_size()
2) "continuous mode" flash and spi controller with dirmap support for a
single flash page
In the first case, any read that exceeds the limit specified in adjust_op_size()
will result in an EIO error. The limit may even be less than a size of a single
flash page. In this case, any read will result in an error.
In the second case, any read larger than flash page size will result in an EIO
error or spinand driver spoofing (because the spi controller driver returns
more bytes than were actually read).
This patch series tries to fix continuous reading (spinand driver side).
Unfortunately these fixes can't resolve "spinand driver spoofing" case.
Spi controller drivers might need fixes as well.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
Link: https://github.com/openwrt/openwrt/pull/20295
Signed-off-by: Robert Marko <robimarko@gmail.com>
