RTL83xx devices have two types of receive interrupts for each of its
8 rings. One for packet received and another for ring overflow. When
the switch is flooded with incoming packets the receive handler will
disable the packet receive notification but still keeps the overflow
notification enabled. While the receive path "slowly" processes the
received packets each new packet triggers the overflow IRQ again. The
device becomes unresponsive and eventually produces messages like:
[18441.709764] rcu: Stack dump where RCU GP kthread last ran:
[18441.727892] Sending NMI from CPU 1 to CPUs 0:
[18441.742300] NMI backtrace for cpu 0 skipped: idling at 0x8080e994
[18415.251700] rcu: INFO: rcu_sched detected stalls on CPUs/tasks:
[18415.271350] rcu: 0-...!: (0 ticks this GP) idle=d740/0/0x0 ...
[18415.303046] rcu: (detected by 1, t=6004 jiffies, g=230925, ...
[18415.326095] Sending NMI from CPU 1 to CPUs 0:
[18415.340540] NMI backtrace for cpu 0
Fix this issue by always disabling receive and overflow interrupts at
the same time.
Test with hping3 --udp -p 5021 -d 1400 --flood 192.168.2.72
Before (3sec run):
[183260.324846] rtl838x-eth 1b00a300.ethernet eth0: RX buffer overrun: status 0x101, mask: 0x7ffeff
[183260.340524] rtl838x-eth 1b00a300.ethernet eth0: RX buffer overrun: status 0x1, mask: 0x7ffeff
[183260.345799] net_ratelimit: 489997 callbacks suppressed
After (3 sec run):
[ 373.981479] rtl838x-eth 1b00a300.ethernet eth0: rx ring overrun: status 0x101, mask: 0x7fffff
[ 374.031118] rtl838x-eth 1b00a300.ethernet eth0: rx ring overrun: status 0x101, mask: 0x7fffff
[ 377.919996] net_ratelimit: 34 callbacks suppressed
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19365
(cherry picked from commit 963ee6ac3f)
Signed-off-by: Felix Baumann <felix.bau@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19891
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Since the early beginning of the Realtek DSA driver there is an uncovered
locking issue between the standard (parent) mdio bus and the DSA (child)
mdio bus. This comes from the fact that the DSA bus simply links to the
parent read and write functions and calls them directly. This leads to
the following lock issue.
- Child bus calls phy_read/write functions and uses its internal lock
- Parent bus calls phy_read/write functions and uses its internal lock
It becomes clear that critical section can be accessed twice without
knowing that a operation from the other bus is currently active. This
can lead to critical malfunctions because the mdio driver needs a lot of
internal magic to get page selection done right. Effects are:
- The original page is lost after a phy_write/read_paged() call
- dmesg like "Realtek RTL8218B (external) rtl838x slave mii-0:00:
Expected external RTL8218B, found PHY-ID 6b23"
Other DSA drivers simply use the read/write functions from the parent bus
and thus avoid locking issues. Do it the same way.
Fixes: 2b88563ee5 ("realtek: update the tree to the latest refactored version")
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18824
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 461fc06f9d)
Link: https://github.com/openwrt/openwrt/pull/18755
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Cleanup the code of the RTL83xx packet receive interrupt handler. Not
only for better readability but to avoid inconsistencies and stalls on
the RTL839x targets.
The current implementation seems to come from the GPL source code.
Calling the existing cleanup() function inside the interrupt context
without any locks conflicts with SMP & NAPI polling and makes things
worse instead of giving any benefit. Simply ignore RX buffer overruns
and let the device handle packet dropping itself.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18855
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 8dde1e4638)
Link: https://github.com/openwrt/openwrt/pull/18755
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The RTL8214FC currently uses generic PHY functions. That makes it look like a copper
device. Switching to/from fibre works fortunately but the autonegotiation handling
still works on MII_LPA (PHY register 5) as if a copper link is used. Fix that by
- advertising a superset of TP/FIBRE features
- using clause 37 functions when on fibre
Additionally enhance the code of the driver to assist further development.
- log the speed of the inserted module to detect wrongly inserted 10gbase-r modules
- order phy driver functions alphabetically (keep match/name on top)
- remove genphy_loopback as the kernel uses it if not provided
Remark! The driver internally uses PORT_MII for the TP port. Align with that and
report MII to ethtool instead of TP. Other drivers do the same and it can be
changed in the future if needed.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/18724
Signed-off-by: Robert Marko <robimarko@gmail.com>
(cherry picked from commit 4cfd1c4501)
Link: https://github.com/openwrt/openwrt/pull/18755
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Commit d7e82c78d7 added a generic kernel patch that exposes a new
symbol REALTEK_PHY_HWMON when REALTEK_PHY and HWMON are enabled. The new
symbol was added to kmod-phy-realtek, but the kmod is not used in the
realtek target.
Fixes: d7e82c78d7 ("generic: backport Realtek PHY patches from upstream")
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
(cherry picked from commit ab87087672)
This fixes the handling of some FS copper SFP modules using the RollBall
protocol and needing some extra treatment.
Signed-off-by: Martin Schiller <ms@dev.tdt.de>
(cherry picked from commit bbe58f9830)
Currently, network ports using PHYs get a link, but there is no traffic.
Make it work again by moving the MAC config to phylink_mac_link_up.
A similiar change has been previously applied for RTL83xx in commit
cd958d945b ("realtek: 6.6: refactor mac config and link up for
RTL83xx").
Fixes: https://github.com/openwrt/openwrt/issues/17010
Signed-off-by: Jan Hoffmann <jan@3e8.eu>
Tested-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18268
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit a7e1e13817)
By switching to the new RTL8231 driver in commit b7af54d5c1 ("realtek:
Simple conversions to RTL8231 MFD driver"), the bootloader state of the
RTL8231's pins is now maintained. As the bootloader de-asserts the PoE
enable signal, this means PoE output is no longer available.
Add a gpio-hog with high output, restoring the line value from when the
pin was configured (by default) as an input with a pull-up resistor.
This will hard-enable the PoE output, but the individual ports can still
be administratively disabled by realtek-poe or a similar tool.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 890293c13c)
The JG928A has an RTL8231 on the aux mdio bus. Add it to dts to expose
the GPIO pins used to control and monitor the fan speed. To enable speed
control, add the appropriate kernel driver module to DEVICE_PACKAGES.
Of note, this does not control all fans for the unit. The power supply
fans are not controlled.
Signed-off-by: Evan Jobling <evan@jobling.au>
Link: https://github.com/openwrt/openwrt/pull/17699
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit cbd1acbad3)
The old RTL8231 driver integrated the MDIO bus access with the GPIO
control ops, making this driver not very portable to newer platforms.
It depended on the SoC ID instead of the compatible to determine the
MDIO access register, further complicating portability.
A new MFD driver is now available, which offers proper pin config as
well as optional LED support, which can work on any (bitbanged) MDIO
bus. Now that all devices have been migrated, we can drop the old code.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit b410f2216c)
By switching to the new RTL8231 driver in commit b7af54d5c1 ("realtek:
Simple conversions to RTL8231 MFD driver"), the bootloader state of the
RTL8231's pins is now maintained. As the bootloader de-asserts the PoE
enable signal, this means PoE output is no longer available.
Add a gpio-hog with high output, restoring the line value from when the
pin was configured (by default) as an input with a pull-up resistor.
This will hard-enable the PoE output, but the individual ports can still
be administratively disabled by realtek-poe or a similar tool.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 807074309d)
Update the common external GPIO DTSI file for the DGS-1210 devices to
use an MDIO device on the auxilairy MDIO bus, as the original driver was
doing behind the screen.
Switching to the new driver will allow for full pin-control and will no
longer reset pin config set by the bootloader.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 3d6a1a7874)
The DTS file for the DGS-1210-10P is slightly different from the other
DGS-1210 devices, in that it didn't specify a gpio-restart node when it
was added. The gpio-restart has been found to work on the DGS-1210-10P
as well, so switch it over to the common definitions.
This converts the last device from the product family to the common
definition for the (external) GPIOs.
Tested-by: Michel Thill <jmthill@gmail.com>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 7c0d1c1eb1)
The 'indirect-access-id' property on gpio0 is a remnant from the
original GPIO driver. This property has not been relevant on the SoC's
embedded GPIO controller for a long time, so just drop it.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 022b7d80bf)
Change devices with RTL8231 GPIO expander definition that can easily be
translated to the new RTL8231 binding and carry over any gpio-hogs. This
will let them use the new RTL8231 MFD driver, without any functional
changes.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit b7af54d5c1)
Zyxel GS1900-8 v2 devices have been produced more recently than v1
devices. As there are v1 boards with RTL8380M rev. C SoCs, it can likely
safely be assumed that all v2 devices will also have a recent SoC
revision, supporting the hardware auxiliary MDIO controller.
Make the GS1900-8 v1 use an emulated auxiliary MDIO bus, for backward
compatibility with devices containing an RTL8380M rev. A.
Since the devicetrees are otherwise identical, GS1900-8 v1 devices with
an RTL8380M rev. B or C will also be able to use the (more efficient) v2
image. This includes any currently functioning device with OpenWrt, so
include the old compatible as a supported device for the GS1900-8 v2.
Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 7322d3266d)
The mdio-gpio driver is required to support early revision of RTL8380M
slicon (rev A) where the auxilairy MDIO controller does not function
correctly. Add this driver to the rtl838x kernel so devices with old
SoCs are also able to function correctly.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit efffcfa436)
In order to be able to define the external GPIO controller on an
emulated MDIO bus, move the controller definition outside of the main
GS1900 include for RTL838x-based devices.
Additionally, a new DTSI is provided defining the RTL8231 on the
emulated MDIO bus.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit a6a77896f4)
Some RTL8380M-based devices have been around for a long time and use an
early A revision of the RTL8380M SoC. This revision has an issue with
the auxiliary MDIO controller, causing it to malfunction. This may lead
to device reboots when the controller is used.
Provide a bit-banged MDIO bus, which muxes the auxiliary MDIO pins to
their GPIO function. Although this will result in lower performance,
there should otherwise be no functional differences.
Link: https://github.com/openwrt/openwrt/issues/9534
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit d4bf16a9e1)
As the bootloader is reconfiguring the RTL8231 on these devices anyway,
no pin state can be maintained over warm reboots. This results in for
example the PoE disable pin always being asserted by the bootloader.
Define the GPIO line linked to the RTL8231's reset so the MDIO subsystem
will also reset the expander on boot and ensure the line in the correct
state.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit b2d17dbb68)
Switch the Zyxel GS1900-48 over to the new MDIO-based driver for the
RTL8231 GPIO expander.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 45aafe67f3)
Enable the RTL8231 MFD core driver, as well as the pinctrl/gpio driver
to allow RTL839x devices to use it.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit fd5797b7ce)
Enable the driver for the Realtek Otto auxiliary MDIO driver so RTL839x
devices can use it. The related node is added to the base devicetree for
rtl839x-based devices, so they can enabled and use it when required.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit cddcc69ddf)
For RTL839x, the driver was producing frequent timeouts on bus accesses.
Increasing the timeout to the one from a recent Realtek SDK resolves
these timeouts. To minimize overhead on different SoCs, each controller
can specify their own timeout.
This also add support for the register format as used on RTL93xx.
Support is added for the RTL930x "ext gpio" controller.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 52ffef6471)
regmap_read_poll_timeout() relies on usleep_range() to time the polling
loop. With the current, rather large, scheduling interval, a short
usleep_range() may take a lot longer than expected, causing performance
issues.
Switch the driver over to using regmap_read_poll_timeout_atomic(), which
uses udelay() to time the polling loop.
For comparision, the 'ethtool -m <dev>' command is about 10 times faster
with the atomic variant.
Using 'perf -r10 ethtool -m lan25':
- Driver using regmap_read_poll_timeout():
2.0117 +- 0.0118 seconds time elapsed ( +- 0.58% )
- Driver using regmap_read_poll_timeout_atomic():
0.1674 +- 0.0250 seconds time elapsed ( +- 14.95% )
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 693c1ea81a)
Apply the equivalent of commit f64541db02 ("realtek: HPE 1920 8G PoE+
180W move fans to hwmon") to the 24-ports variants of the HPE 1920 PoE+
switches, with model numbers JG925A and JG926A.
Copy from the original commit message:
Move to using hwmon and gpio-fan. This is by adding gpio_fan_array to
DTS and kmod-hwmon-gpiofan to DEVICE_PACKAGES.
In combination with the new rtl8231 gpio driver the default fan
behaviour will be maximum fan speed.
Bump compat value to 1.1 due to existing config in /etc/config/system
via gpio_switch. Also notify in device compat that fan is now going to
be at bootloader setting (maximum in this case) by default unless turned
down.
As the init script 03_gpio_switches does not perform any action after
removing these devices from it, the file can be dropped.
Link: https://github.com/openwrt/openwrt/pull/17598
Signed-off-by: Fabian Groffen <grobian@gentoo.org>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 0a7c8ed9d9)
Update the base DTS file for the 16 and 24 port HPE 1920 devices
(JG923A, JG924A, JG925A, JG926A), causing the new RTL8231 MFD driver to
be loaded at start-up.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 96850585e5)
The GPIO numbering has changed and is not stable. As a result fan
control via gpio_switch is broken, resulting in errors:
"export_store: invalid GPIO 456"
Move to using hwmon and gpio-fan. This is by adding gpio_fan_array to
DTS and kmod-hwmon-gpiofan to DEVICE_PACKAGES.
In combination with the new rtl8231 gpio driver the default fan
behaviour will be maximum fan speed.
Bump compat value to 1.1 due to existing config in /etc/config/system
via gpio_switch. Also notify in device compat that fan is now going to
be at bootloader setting (maximum in this case) by default unless turned
down.
Signed-off-by: Evan Jobling <evan@jobling.au>
Link: https://github.com/openwrt/openwrt/pull/17605
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit f64541db02)
Update the base DTS file for the 8 port HPE 1920 devices (JG920A,
JG921A, JG922A), causing the new RTL8231 MFD driver to be loaded at
start-up.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit e5d1a501cb)
Update the devicetree files to switch the GS1900 devices over to the new
pinctrl and GPIO driver. Enable the drivers to ensure the nodes can be
used.
This may fix issues caused by bad RMW behaviour on the GPIO data lines,
or glitches due to setting the pin direction before the pin level.
Although the driver supports retaining GPIO state after a warm boot,
some bootloaders appear to apply a default configuration on boot, which
may cause an interrupt in PoE-PSE support.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 5141e2d861)
Add pending patches to add RTL8231 support as a MDIO-bus attached
multi-functional device. This includes subdrivers for the pincontrol and
GPIO features, as well as the LED matrix support.
Leave the drivers disabled until required by a device.
Cherry picked from commit 6ef6014887, but
dropped already picked patch for gpio-regmap request/free, and rebased
configs
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Add a disabled node for the auxiliary MDIO bus, used to manage the
RTL8231 expanders. A simple-mfd parent node is added, at the same
(implied) address as the switch@1b000000 node, as the switch drivers
should anyway transistion to MFD subdivices at some point.
Additionally, two pinctrl-single node are added to allow the MDX pins to
be muxed correctly, in case the bootloader leaves these unconfigured.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 92ae8cb16c)
Add a driver that exposes the auxiliary busses, used for the RTL8231
expanders, as a proper MDIO controller. The device must be instantiated
under an MFD device, so the driver should also be compatible with SoC
managed by an external CPU via SPI.
Leave the driver disabled in builds until required.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit ae833c01b3)
Supported devices are listed in the metadata as the first part of the
DTS compatible. This normally follows the format "vendor,device".
When updating the device name of the 180W 1920-8G PoE an underscore was
used, instead of a comma, to join the vendor and device name. This will
lead to warnings for users wanting to sysupgrade a device with an older
compatible, as the device's info does not match the one the metadata.
Fixes: 987c96e889 ("realtek: rename hpe,1920-8g-poe to match hardware")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 6a7fa68569)
When the reset button is next to the SFP cages, I2C operations on the
modules might cause interference on the button's GPIO line. Add a
debounce-interval of 5 times the poll-interval to ensure the line is
actually stable for some time and not just glitching.
This squashes commit 4357f32d41 ("realtek: debounce reset key for
Zyxel GS1900") and commit 777c6106ed ("realtek: move debounce-interval
to correct node").
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Images for certain devices are staring to become too large, as some
device only have 6MB available in their vendor partition layout for the
initial install. This is especially pressing for bootloaders only
supporting gzip compression.
Drop some packages from DEFAULT_PACKAGES that aren't strictly required
for a factory install. The user can always install more packages later
using opkg/apk, or via a sysupgrade to a custom build.
firewall4 is kept to ensure the most recent firewall package is selected
in builds including LuCI.
ethtool is kept as a frequently used diagnostics tool.
Link: https://github.com/openwrt/openwrt/pull/17450
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit c9ae39b2d1)
Add 1920-24g-poe-180w to the mac address retrieval part of 02_network to
properly set the device's port MAC addresses.
This piece was missed when this device was added.
Fixes: b948c1e39b ("realtek: add support for HPE 1920-24G PoE-180W (JG925A)")
Link: https://github.com/openwrt/openwrt/pull/17460
Signed-off-by: James Sweeney <code@swny.io>
(cherry picked from commit 0b54029a6e)
The extraneous closing parenthesis inside the case matching breaks
syntax of the network initialization script 02_network.
/bin/board_detect: /etc/board.d/02_network:
line 40: syntax error: unexpected newline (expecting ")")
Remove this character so board init is functional again.
Fixes: c8ea1aa970 ("realtek: add support for HPE 1920-24G-PoE-370w")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit a3391d871d)
Hardware information: (largely copied from 11275be)
---------------------
The HPE 1920-24G-PoE+ (180W) (JG925A) is a switch that is
part of the 1920 family which has 180W nominal PoE+ support.
Common with HPE 1920-24G:
- RTL8382 SoC
- 24 Gigabit RJ45 ports (built-in RTL8218B, 2 external RTL8218D)
- 4 SFP ports (external RTL8214FC)
- RJ45 RS232 port on front panel
- 32 MiB NOR Flash
- 128 MiB DDR3 DRAM
- PT7A7514 watchdog
HPE 1920-24G-PoE+ (180W):
- PoE chip
- 2 fans (40mm)
Known issues:
---------------------
- PoE LEDs are uncontrolled.
(Manual taken from f2f09bc)
Booting initramfs image:
------------------------
- Prepare a FTP or TFTP server serving the OpenWrt initramfs image and
connect the server to a switch port.
- Connect to the console port of the device and enter the extended
boot menu by typing Ctrl+B when prompted.
- Choose the menu option "<3> Enter Ethernet SubMenu".
- Set network parameters via the option "<5> Modify Ethernet Parameter".
Enter the FTP/TFTP filename as "Load File Name" ("Target File Name"
can be left blank, it is not required for booting from RAM). Note that
the configuration is saved on flash, so it only needs to be done once.
- Select "<1> Download Application Program To SDRAM And Run".
Initial installation:
---------------------
- Boot an initramfs image as described above, then use sysupgrade to
install OpenWrt permanently. After initial installation, the
bootloader needs to be configured to load the correct image file
- Enter the extended boot menu again and choose "<4> File Control",
then select "<2> Set Application File type".
- Enter the number of the file "openwrt-kernel.bin" (should be 1), and
use the option "<1> +Main" to select it as boot image.
- Choose "<0> Exit To Main Menu" and then "<1> Boot System".
NOTE: The bootloader on these devices can only boot from the VFS
filesystem which normally spans most of the flash. With OpenWrt, only
the first part of the firmware partition contains a valid filesystem,
the rest is used for rootfs. As the bootloader does not know about this,
you must not do any file operations in the bootloader, as this may
corrupt the OpenWrt installation (selecting the boot image is an
exception, as it only stores a flag in the bootloader data, but doesn't
write to the filesystem).
Example PoE config file (/etc/config/poe):
---------------------
config global
option budget '180'
config port
option enable '1'
option id '1'
option name 'lan8'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '2'
option name 'lan7'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '3'
option name 'lan6'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '4'
option name 'lan5'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '5'
option name 'lan4'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '6'
option name 'lan3'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '7'
option name 'lan2'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '8'
option name 'lan1'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '9'
option name 'lan16'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '10'
option name 'lan15'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '11'
option name 'lan14'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '12'
option name 'lan13'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '13'
option name 'lan12'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '14'
option name 'lan11'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '15'
option name 'lan10'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '16'
option name 'lan9'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '17'
option name 'lan24'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '18'
option name 'lan23'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '19'
option name 'lan22'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '20'
option name 'lan21'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '21'
option name 'lan20'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '22'
option name 'lan19'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '23'
option name 'lan18'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '24'
option name 'lan17'
option poe_plus '1'
option priority '2'
Signed-off-by: James Sweeney <code@swny.io>
Link: https://github.com/openwrt/openwrt/pull/17444
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit b948c1e39b)
Hardware information:
---------------------
The HPE 1920-24G-PoE+ (370W) (JG926A) is a switch that is
part of the 1920 family wich 370W nominal PoE+ support.
Common with HPE 1920-24G:
- RTL8382 SoC
- 24 Gigabit RJ45 ports (built-in RTL8218B, 2 external RTL8218D)
- 4 SFP ports (external RTL8214FC)
- RJ45 RS232 port on front panel
- 32 MiB NOR Flash
- 128 MiB DDR3 DRAM
- PT7A7514 watchdog
HPE 1920-24G-PoE+ (370W):
- PoE chip
- 3 fans (40mm)
Known issues:
---------------------
- PoE LEDs are uncontrolled.
(Manual taken from f2f09bc)
Booting initramfs image:
------------------------
- Prepare a FTP or TFTP server serving the OpenWrt initramfs image and
connect the server to a switch port.
- Connect to the console port of the device and enter the extended
boot menu by typing Ctrl+B when prompted.
- Choose the menu option "<3> Enter Ethernet SubMenu".
- Set network parameters via the option "<5> Modify Ethernet Parameter".
Enter the FTP/TFTP filename as "Load File Name" ("Target File Name"
can be left blank, it is not required for booting from RAM). Note that
the configuration is saved on flash, so it only needs to be done once.
- Select "<1> Download Application Program To SDRAM And Run".
Initial installation:
---------------------
- Boot an initramfs image as described above, then use sysupgrade to
install OpenWrt permanently. After initial installation, the
bootloader needs to be configured to load the correct image file
- Enter the extended boot menu again and choose "<4> File Control",
then select "<2> Set Application File type".
- Enter the number of the file "openwrt-kernel.bin" (should be 1), and
use the option "<1> +Main" to select it as boot image.
- Choose "<0> Exit To Main Menu" and then "<1> Boot System".
NOTE: The bootloader on these devices can only boot from the VFS
filesystem which normally spans most of the flash. With OpenWrt, only
the first part of the firmware partition contains a valid filesystem,
the rest is used for rootfs. As the bootloader does not know about this,
you must not do any file operations in the bootloader, as this may
corrupt the OpenWrt installation (selecting the boot image is an
exception, as it only stores a flag in the bootloader data, but doesn't
write to the filesystem).
Example PoE config file (/etc/config/poe):
---------------------
config global
option budget '370'
config port
option enable '1'
option id '1'
option name 'lan8'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '2'
option name 'lan7'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '3'
option name 'lan6'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '4'
option name 'lan5'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '5'
option name 'lan4'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '6'
option name 'lan3'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '7'
option name 'lan2'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '8'
option name 'lan1'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '9'
option name 'lan16'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '10'
option name 'lan15'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '11'
option name 'lan14'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '12'
option name 'lan13'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '13'
option name 'lan12'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '14'
option name 'lan11'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '15'
option name 'lan10'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '16'
option name 'lan9'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '17'
option name 'lan24'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '18'
option name 'lan23'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '19'
option name 'lan22'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '20'
option name 'lan21'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '21'
option name 'lan20'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '22'
option name 'lan19'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '23'
option name 'lan18'
option poe_plus '1'
option priority '2'
config port
option enable '1'
option id '24'
option name 'lan17'
option poe_plus '1'
option priority '2'
Signed-off-by: Evan Jobling <evan.jobling@mslsc.com.au>
Signed-off-by: Fabian Groffen <grobian@gentoo.org>
Link: https://github.com/openwrt/openwrt/pull/17436
[fix space indentation in DTS]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit c8ea1aa970)
The HPE JG924A, JG925A and JG926A share the same base.
Prepare base device for adding the PoE enabled switch support.
Signed-off-by: Evan Jobling <evan.jobling@mslsc.com.au>
Signed-off-by: Fabian Groffen <grobian@gentoo.org>
Link: https://github.com/openwrt/openwrt/pull/17436
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 41b49a157a)
The GS1900 images have been updated to have a larger firmware partition,
bumping the compatibility version to 2.0. However, since this version is
generated on first boot and the default was used, these images still
advertised 1.0 after a fresh install.
Add a new uci-defaults script that will generate the correct version for
all affected Zyxel GS1900 devices.
Fixes: 35acdbe909 ("realtek: merge Zyxel GS1900 firmware partitions")
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit a25809a474)
The dual-boot partition layout for the Zyxel GS1900 switches results in
6.9MB for both kernel and rootfs. Depending on the package selection,
this may already leave no space for the user overlay.
Merge the two firmware partitions, effectively dropping dual boot
support with OpenWrt. This results in a firmware partition of 13.9MB,
which should leave some room for the future.
To maintain install capabilites on new devices, an image is required
that still fits inside the original partition. The initramfs is used as
factory install image, so ensure this meets the old size constraints.
The factory image can be flashed via the same procedure as vendor images
when reverting to stock, can be installed from stock, or can be launched
via tftpboot.
Link: https://github.com/openwrt/openwrt/issues/16439
Link: https://github.com/openwrt/openwrt/pull/16442
Tested-by: Stijn Segers <foss@volatilesystems.org>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
(cherry picked from commit 35acdbe909)
