The kernel config accidentally contains CONFIG_UBIFS_FS_AUTHENTICATION
which select a number of other unnecessary components, remove them.
The target has at least two subtargets, only one is currently
implemented. Move the Device builds into a file for this subtarget.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/20027
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Now that HSGMII is not used any longer drop the patch
the invents this mode.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20002
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The only consumers of the Realtek HSGMII (2.5G SGMII) mode were
the RTL8226/RTL8221B PHYs. These have been converted to dynamic
SGMII/2500base-x mode switching. Drop the leftovers of the mode
implementation.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/20002
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mdio controller got its own dts node with a dedicated bus node.
Until now it still searches the phy nodes in the ethernet node.
Change the driver so it searches the nodes at the right location.
For this to work move the phy nodes in all dts/dtsi over to the new
bus node. Use the following replacement rule:
Replace old full declaration
ðernet0 {
mdio-bus {
...
};
};
and old abbreviated declaration
&mdio {
...
};
simply with the new declaration
&mdio_bus0 {
...
};
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19986
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The mdio controller has now its own target specific device nodes. This
is much closer to upstream notation. Adapt the driver to make use of it.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19986
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Until now the mdio bus is a subnode of the ethernet device. This
coupling is different from upstream and wrong. Ethernet and mdio
are different devices. Additionally differentiate between mdio
controller and mdio bus. To make it clear:
- There is one mdio controller
- With up to 4 busses (on RTL93xx)
Prepare new mdio controller and bus nodes with SoC specific compatibles.
These will be used later when refactoring the mdio driver probing.
Remark! For now only define the first bus for the RTL93xx targets.
So the driver still relies on "rtl9300,smi-address = <x y>;". It will
need much more refactoring to get totally aligned with upstream.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19986
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
While converting the RTL931x SerDes code to the new frontend
access methods, the target specific workarounds where left in
place. The old functions were kept and the phy/sds mapping
was unchanged too. It is time to clean this up
- drop the old functions
- reuse the existing read/write logic
- harden the new functions
For now keep the function naming rtmdio_...__new() as is. This
will be changed in a future commit.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19973
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
They have the same 0x200 calibration size.
Added various compatible lines in various places to make it clear what
device we're talking about.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19863
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These devices use AR9285, which uses 1f8 as the calibration size, not
440 like newer chips do. Actually the driver mandates a minimum of 200.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19863
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The TP-Link Archer VR1200v (v2) is a low end DSL modem based on the
EcoNet EN751221 processor platform.
While it does have an unlocked bootloader, the factory upgrade feature
requires a cryptographic signature so flashing from the web UI is not
feasible.
The Archer VR1200v (v2) uses a dual-image layout. I have chosen to reuse
this to support dual-boot between OpenWRT and the factory firmware.
Flashing instructions (from bootloader):
Build and then locate the squashfs-sysupgrade.bin image file
Get the length of that file in hex: printf '%X\n' "$(stat -c%s the-file-squashfs-sysupgrade.bin)"
Connect to device with xmodem capability, e.g. picocom --send-cmd lsx -vv -b 115200 /dev/ttyUSB0
Switch device on and press a key within 3 seconds, you should get to a `bldr>` prompt
Type: xmdm 80020000 <file length hex>
Quickly start xmodem and send the file, in picocom that is ctrl+a ctrl+s <paste-the-file-name> enter If the transfer fails to start, wait 30 seconds to a minute for the bootloader prompt to return and then try the command again.
Once the transfer has completed successfully, type the following flash 80000 80020000 <file length hex>
Type `re` or simply restart the device to boot into OpenWRT
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/19021
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The SmartFiber XP8421-B is a fiber modem which is available for $20 online
and has 512MB of memory, 256MB of SPI NAND flash and 2 USB 2.0 ports in
addition to ethernet, wifi and XPON.
Because EcoNet is not currently producing evaluation boards, the XP8421-B
stands in as a convenient, low cost, off-the-shelf, representitive example
of the capabilities of the EN751221 econet processor. This is also the
example board that is included in the upstream Linux patchset.
The XP8421-B, and apparently many other devices of this platform, use a
dual-image layout. I have chosen to reuse this to support dual-boot between
OpenWRT and the factory firmware. Certain design decisions were made with
the goal of not overwriting data that is used by the factory OS.
This commit also introduces a utility for switching between OS_A and OS_B
which are used for OpenWRT and Factory OS respectively.
Flashing instructions (from bootloader):
Build and then locate the squashfs-tclinux.trx image file
Get the length of that file in hex: printf '%X\n' "$(stat -c%s the-file-squashfs-tclinux.trx)"
Connect to device with xmodem capability, e.g. picocom --send-cmd lsx -vv -b 115200 /dev/ttyUSB0
Switch device on and press a key within 3 seconds
Enter bootloader username and password: telecomadmin nE7jA%5m
Type: xmdm 80020000 <file length hex>
Quickly start xmodem and send the file, in picocom that is ctrl+a ctrl+s <paste-the-file-name> enter If the transfer fails to start, wait 30 seconds to a
minute for the bootloader prompt to return and then try the command again.
Once the transfer has completed successfully, type the following flash 80000 80020000 <file length hex>
Type go or simply restart the device to boot into OpenWRT
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/19021
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
EcoNet EN75xx is a big endian MIPS platform used in XPON (fiber),
DSL, and SIM (3g/4g) applications. Complete GPL vender SDKs exist
for this platform, but are based on Linux 2.6.
The bulk of this submission has already been accepted upstream:
https://patchwork.kernel.org/project/linux-mips/list/?series=960479&state=*
This platform uses a bootloader that is derived from old TrendChip
code. This bootloader implements a frustratingly complex Bad Block
Table which is implemented here in en75_bmt.c
This BMT is not upstreamed because it depends on mtk_bmt framework
which likewise is not upstreamed.
This BMT system rewrites block indexes in flash and if the bootloader
considers it to be corrupted, it will attempt to automatically rebuild
on boot. So without implementing the algorithm, you can't safely use
the disk at all.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Link: https://github.com/openwrt/openwrt/pull/19021
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
1/2GB LPDDR4 RAM
2x 2500 Base-T (PCIe, r8125b)
1 LED (Power)
1 Button (Reset)
Micro-SD Slot
2x USB 3.0 Port
12V DC Jack
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.
Tested-by: Francisco G Luna <frangonlun@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/19990
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add labels wan and cpu for ethernet ports.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19968
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Currently 5G wireless interface MAC address is incorrect.
Fix by setting MAC address using Factory data.
Signed-off-by: Paweł Owoc <frut3k7@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19968
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert NWA50AX Pro to use NVMEM framework for wifi macaddr.
Also remove the unused macaddr@a.
Signed-off-by: Zhi-Jun You <hujy652@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/19982
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Convert NWA50AX Pro to use NVMEM framework for EEPROM/precal.
Signed-off-by: Zhi-Jun You <hujy652@protonmail.com>
Link: https://github.com/openwrt/openwrt/pull/19982
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
These are already specified in DTS. Only thing missing is
label-mac-device.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19806
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Support in mt76 has existed for quite a while. Use it.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19806
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After trying to implement the gluon support for this device I ended up in a boot loop due to the usable amount of flash left. With this patch layout it uses the unused and empty flash space in the original partiton layout.
The version 3 of this device the RE365 share the same approach to have more usable space.
Signed-off-by: Steffen Förster <nemesis@chemnitz.freifunk.net>
Link: https://github.com/openwrt/openwrt/pull/18639
Signed-off-by: Sander Vanheule <sander@svanheule.net>
A lot of definitions in the global mach include have been taken over
to the individual drivers. Only a few of the definitions are really
used nowadays. Remove all the unneeded lines.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/19995
Signed-off-by: Robert Marko <robimarko@gmail.com>
- shrink data structures
- avoid unnecessary divisions
- support GSO fraglist on tx
Reapply with fixed patch
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Use Linux kernel version 6.12 by default for loongarch64 target.
Signed-off-by: Weijie Gao <hackpascal@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19980
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Boards such as [1] and [2] add an extra Ethernet port to Raspberry Pi (CM)5.
These typically use Realtek PCIe or USB Ethernet NICs. Include kmod-r8169 and
kmod-usb-net-rtl8152 by default to make it easy to configure LAN/WAN ports
with these parts on Raspberry Pi 5.
Because CM5 can fit in the same carrier boards as CM4, also ensure that both
devices have the same Ethernet NIC kmods.
[1]: https://www.waveshare.com/wiki/CM5-DUAL-ETH-MINI
[2]: https://www.waveshare.com/wiki/PCIe_TO_Gigabit_ETH_Board_(C)
Signed-off-by: Elbert Mai <code@elbertmai.com>
Link: https://github.com/openwrt/openwrt/pull/19384
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Certain boards have an at24(-compatible) EEPROM for storing various
parameters like MAC addresses. Enable support for this hardware across
the whole target.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Backport fixes for Airoha pinctrl driver for PHY LED and MDIO bus. This
fix a copy-paste error for PHY LED and a misconfiguration for MT7530
embedded Switch MDIO bus GPIO pin to permit usage of external PHYs.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The RK356x/RK3588 SoCs support up to 10 serial ports.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/19917
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Apart from improved power consumption, this fixes the runtime errors
from the pmdomain driver (failed to set idle on domain '%s')
Backport four clk fixes while at it.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/19925
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
All devices supported by the Zynq target have either a Realtek or Marvell
PHY. The Vitesse PHY was enabled when the target was created (2d45ad07fc).
It's not used here, so it's safe to disable it.
Ethernet PHYs used by individual devices are listed below.
Device PHY
AVNET ZedBoard Marvell 88E1518
Digilent Zybo Realtek RTL8211E
Digilent Zybo Z7 Realtek RTL8211E or RTL8211F
Xilinx ZC702 Marvell 88E1116R
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/19969
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This was done by executing these command:
$ make kernel_oldconfig CONFIG_TARGET=platform
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/19969
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The devices are basically identical. The RAX3000Me can be with
ddr3 RAM.
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit adds ddr3 build for the ddr3 variant of the CMCC RAX3000Me
router.
Signed-off-by: Mikhail Zhilkin <csharper2005@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19760
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware
--------
MediaTek MT7981 WiSoC
512MB DDR4 RAM
128MB SPI-NAND
MediaTek MT7981 2x2 DBDC 802.11ax 2T2R (2.4 / 5)
4 LAN MediaTek MT7531 PHY
1 WAN RTL8221B-VB-CG 2.5Gbps PHY
UART: 115200 8N1 3.3V
USB2 Port
PoE on WAN Port
MAC:
LAN MAC: label mac
WAN MAC: label mac + 1
2.4G MAC: label mac
5G MAC: label mac + 1 with LA bit set
Gotchas:
WAN LED does not light up (might require further DTS tweaks)
PoE on WAN port was not tested
This commit is heavily based on WR3000H one, I've just ported DTS differences
from the official image to get USB support and proper LED mapping.
Installation
------------
[Untested as I've received and used a transitional image from Cudy]
1. Connect to the serial port as described in the "Hardware" section.
2. Power on the device + press reset pin. Keep pressing reset pin to enter the U-Boot shell.
3. Download the OpenWrt initramfs image. Place it on an TFTP server
connected to the Cudy LAN ports. Make sure the server is reachable at
192.168.1.88. Rename the image to "cudy3000p.bin"
4. Download and boot the OpenWrt initramfs image.
$ tftpboot 0x46000000 cudy3000s.bin; bootm 0x46000000
5. Transfer the OpenWrt sysupgrade image to the device using scp.
Install with sysupgrade.
Signed-off-by: Michal Halva <hedik01@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/19636
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Radxa E52C is a compact network computer using the Rockchip RK3582
SoC.
- https://radxa.com/products/network-computer/e52c
Hardware
--------
- Dual Cortex-A76 and Quad Cortex-A55 CPU
- 5 TOPS NPU
- 2/4/8GB LPDDR4 RAM
- 16/32/64GB on-board eMMC
- microSD card slot
- 2x 2.5 Gigabit Ethernet ports
- USB 3.1 Gen1 Type-A HOST/OTG port
- USB Type-C debug port
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Radxa ROCK 5C (Lite) is a single board computer using the Rockchip
RK3588S2 (RK3582) SoC.
- https://radxa.com/products/rock5/5c
Hardware
--------
- Quad (Dual) Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU (5C only)
- 6 (5) TOPS NPU
- 1/2/4/8/16/32GB LPDDR4X RAM
- eMMC/SPI NOR flash connector
- microSD card slot
- Wi-Fi 6 (AIC8800D80, not yet supported)
- Gigabit Ethernet port with PoE (additional PoE HAT required)
- USB 3.1 Gen1 Type-A HOST/OTG port
- USB 3.1 Gen1 Type-A HOST port
- 2x USB 2.0 Type-A HOST ports
- FPC connector with PCIe 2.1 x1
- PWM fan connector
- 20x2 pin header
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Radxa ROCK 5 ITX(+) is a Mini-ITX form factor computer using the
Rockchip RK3588 SoC.
- https://radxa.com/products/rock5/5itx
- https://radxa.com/products/rock5/5itxp
Hardware
--------
- Quad Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU
- 6 TOPS NPU
- 4/8/16/24/32GB LPDDR5 RAM
- on-board eMMC
- 16MB SPI NOR flash
- microSD card slot
- 2x 2.5 Gigabit Ethernet ports with PoE (additional PoE module required)
- USB 3.1 Gen1 Type-C HOST/OTG port
- 4x USB 3.1 Gen1 Type-A HOST ports
- 2x USB 2.0 Type-A HOST ports
- M.2 M Key connector with PCIe 3.0 x2
- 4x SATA connectors (ITX only)
- 2nd M.2 M Key connector with PCIe 3.0 x2 (ITX+ only)
- M.2 E Key connector with PCIe 2.1 x1 and USB 2.0
- RTC battery socket for CR1220
- 4pin PWM fan connector
- Serial console pin header
- Front panel pin headers
- 24pin ATX power connector
- 5525 12V DC jack
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The Radxa ROCK 5B+ is a single board computer using the Rockchip
RK3588 SoC.
- https://radxa.com/products/rock5/5bp
Hardware
--------
- Quad Cortex-A76 and Quad Cortex-A55 CPU
- Mali-G610 MP4 GPU
- 6 TOPS NPU
- 4/8/16/24/32GB LPDDR5 RAM
- 16/32/64/128/256GB on-board eMMC (optional)
- 16MB SPI NOR flash
- microSD card slot
- Wi-Fi 6 (Realtek RTW8852BE)
- 2.5 Gigabit Ethernet port with PoE (additional PoE HAT required)
- USB 3.1 Gen1 Type-C HOST/OTG port
- 2x USB 3.1 Gen1 Type-A HOST ports
- 2x USB 2.0 Type-A HOST ports
- 2x M.2 M Key connectors with PCIe 3.0 x2
- M.2 B Key connector
- SIM card slot
- RTC battery connector
- PWM fan connector
- 20x2 pin header
- USB Type-C power port
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
eMMC using dd.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport dts changes up to Linux v6.17 for Radxa E52C.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport dts changes up to Linux v6.17 for Radxa ROCK 5C and 5C Lite.
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/19867
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
