From b948cc17b41918ba7437ed08841c2958fffed4ff Mon Sep 17 00:00:00 2001 From: Markus Stockhausen Date: Wed, 7 Jan 2026 12:16:53 +0100 Subject: [PATCH] realtek: dts: convert devices to mdio bus 1-3 Switch the mdio bus topology for devices that have their phys attached to bus 1-3. This does not have any impact because the mdio driver was completly redisgned With this commit the bus id is stored twice. Once in the (new) bus and in the (old) realtek,smi-address property. E.g. &mdio_bus1 { reg = <1>; <<< bus id phy24: ethernet-phy@24 { reg = <26>; compatible = "ethernet-phy-ieee802.3-c22"; realtek,smi-address = <1 2>; <<< bus & address id }; }; This redundancy will be removed later. Signed-off-by: Markus Stockhausen Link: https://github.com/openwrt/openwrt/pull/21438 Signed-off-by: Hauke Mehrtens --- target/linux/realtek/dts/rtl9301_linksys_lgs328c.dts | 8 +++++++- target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts | 6 +++++- target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts | 6 +++++- .../realtek/dts/rtl9302_zyxel_xgs1x10-12-common.dtsi | 4 ++++ .../linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts | 2 ++ target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts | 3 +++ target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi | 2 ++ 7 files changed, 28 insertions(+), 3 deletions(-) diff --git a/target/linux/realtek/dts/rtl9301_linksys_lgs328c.dts b/target/linux/realtek/dts/rtl9301_linksys_lgs328c.dts index fff883696a..462bf0b3fc 100644 --- a/target/linux/realtek/dts/rtl9301_linksys_lgs328c.dts +++ b/target/linux/realtek/dts/rtl9301_linksys_lgs328c.dts @@ -105,7 +105,10 @@ reg = <7>; compatible = "ethernet-phy-ieee802.3-c22"; realtek,smi-address = <0 7>; - }; + }; +}; + +&mdio_bus1 { phy8: ethernet-phy@8 { reg = <8>; compatible = "ethernet-phy-ieee802.3-c22"; @@ -146,6 +149,9 @@ compatible = "ethernet-phy-ieee802.3-c22"; realtek,smi-address = <1 15>; }; +}; + +&mdio_bus2 { phy16: ethernet-phy@16 { reg = <16>; compatible = "ethernet-phy-ieee802.3-c22"; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts index 6bbaf0ae06..decd007d1f 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-a1.dts @@ -8,7 +8,7 @@ model = "Zyxel XGS1250-12 A1 Switch"; }; -&mdio_bus0 { +&mdio_bus1 { /* External Aquantia 113C PHYs */ phy24: ethernet-phy@24 { reg = <24>; @@ -18,7 +18,9 @@ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; }; +}; +&mdio_bus2 { phy25: ethernet-phy@25 { reg = <25>; compatible = "ethernet-phy-ieee802.3-c45"; @@ -27,7 +29,9 @@ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; }; +}; +&mdio_bus3 { phy26: ethernet-phy@26 { reg = <26>; compatible = "ethernet-phy-ieee802.3-c45"; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts index a3f0120013..30e19445b2 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1250-12-b1.dts @@ -8,7 +8,7 @@ model = "Zyxel XGS1250-12 B1 Switch"; }; -&mdio_bus0 { +&mdio_bus1 { phy24: ethernet-phy@24 { reg = <24>; compatible = "ethernet-phy-ieee802.3-c45"; @@ -17,7 +17,9 @@ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; }; +}; +&mdio_bus2 { phy25: ethernet-phy@25 { reg = <25>; compatible = "ethernet-phy-ieee802.3-c45"; @@ -26,7 +28,9 @@ // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; #thermal-sensor-cells = <0>; }; +}; +&mdio_bus3 { phy26: ethernet-phy@26 { reg = <26>; compatible = "ethernet-phy-ieee802.3-c45"; diff --git a/target/linux/realtek/dts/rtl9302_zyxel_xgs1x10-12-common.dtsi b/target/linux/realtek/dts/rtl9302_zyxel_xgs1x10-12-common.dtsi index 539cdb6229..61f6109262 100644 --- a/target/linux/realtek/dts/rtl9302_zyxel_xgs1x10-12-common.dtsi +++ b/target/linux/realtek/dts/rtl9302_zyxel_xgs1x10-12-common.dtsi @@ -130,14 +130,18 @@ compatible = "ethernet-phy-ieee802.3-c22"; realtek,smi-address = <0 7>; }; +}; +&mdio_bus1 { phy24: ethernet-phy@24 { reg = <24>; compatible = "ethernet-phy-ieee802.3-c45"; // Disabled because we do not know how to bring up again // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; }; +}; +&mdio_bus2 { phy25: ethernet-phy@25 { reg = <25>; compatible = "ethernet-phy-ieee802.3-c45"; diff --git a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts index f7ea33c24c..b16e669aa0 100644 --- a/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts +++ b/target/linux/realtek/dts/rtl9303_hasivo_s1100w-8xgt-se.dts @@ -150,7 +150,9 @@ realtek,smi-address = <0 3>; reg = <20>; }; +}; +&mdio_bus3 { phy24: ethernet-phy@24 { compatible = "ethernet-phy-ieee802.3-c45"; realtek,smi-address = <3 16>; diff --git a/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts b/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts index e31d7ec82c..c1d8201297 100644 --- a/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts +++ b/target/linux/realtek/dts/rtl9311_linksys_lgs352c.dts @@ -200,6 +200,9 @@ compatible = "ethernet-phy-ieee802.3-c22"; realtek,smi-address = <0 23>; }; +}; + +&mdio_bus1 { phy24: ethernet-phy@24 { reg = <24>; compatible = "ethernet-phy-ieee802.3-c22"; diff --git a/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi b/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi index 34333ee93f..b7de43ce1a 100644 --- a/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi +++ b/target/linux/realtek/dts/rtl9312_plasmacloud_common.dtsi @@ -311,7 +311,9 @@ compatible = "ethernet-phy-ieee802.3-c45"; realtek,smi-address = <0 11>; }; +}; +&mdio_bus1 { phy24: ethernet-phy@24 { reg = <24>; compatible = "ethernet-phy-ieee802.3-c45";