The "old" QCA8084 PHY driver does not implement 10g-qxgmii support.
This is blocking several devices which use the QCA8084 form being
merged. Qualcomm has provided updated drivers for the MAC (ppe), PCS,
and PHY via github. We only need to update the PHY driver.
Update the QCA8084 PHY driver using the patches provided by Qualcomm.
Re-organize the patches so that the changes go into the existing
patches. The SERDES functionality is new, so it gets new patches. This
is sufficient to enable 10g-qxgmii on ipq95xx platforms.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20721
Signed-off-by: Robert Marko <robimarko@gmail.com>
Replace Airoha AN7583 pinctrl patch with upstream version as it has been
accepted upstream. Add the related kernel version tag to identify it.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
New Packages / build options:
* sound-midi2: enable MIDI 2.0 / UMP in ALSA MIDI
* sound-midi2-seq: enable MIDI 2.0 / UMP in ALSA sequencer
* sound-midi2-usb: enable USB MIDI 2.0 support
* sound-dynamic-minors: allow more than 8 MIDI devices
More info about ALSA MIDI 2.0:
https://docs.kernel.org/6.12/sound/designs/midi-2.0.html
More info about MIDI 2.0:
https://midi.org/midi-2-0
Signed-off-by: Florian Bomers <github@bome.com>
Link: https://github.com/openwrt/openwrt/pull/20727
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
The unit-address of the ubi partition was @a9c0000 but the partition
actually starts at offset 0x0ad00000. Ideally they should match, so
align them.
Signed-off-by: Christoph Krapp <achterin@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20733
Signed-off-by: Robert Marko <robimarko@gmail.com>
The name "is_lagmember" implies that the port is part of a LAG. But this
information is already stored in lagmembers. In reality, it is stored the
non-primary LAG members. Renaming it accordingly, makes the code a lot more
readable
Also the type (u32 array) looks like it would contain some kind of large id
(like the group ID). But it only stores a single bit. It is more appropriate
to just use a single bit per port.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20707
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The names of the LAG variables in struct rtl838x_switch_priv are not self
explaining. They are even suggesting that they are dealing with information
which are actually stored in a different variable. As first step, document
their meaning.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20707
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
There is no need to check conditions in rtl83xx_lag_add()/rtl83xx_lag_del()
when they are already checked in
rtl83xx_port_lag_join()/rtl83xx_port_lag_leave().
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20707
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It is not necessary to have a private LAG id allocation when the shared DSA
code already provides the complete infrastructure for it.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20707
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The DSA code is responsible to inform the driver about link aggregation
changes. Having a second one which behaves slightly different makes the
whole process fragile and creates hard to debug problems.
It also complicates the code because the secondary event handler can also
not rely on shared DSA state to handle things like LAG ID.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20707
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The rtl83xx_lag_can_offload() function always returned an error because
ds->num_lag_ids was never set. This basically disabled the DSA lag
configuration completely.
Drop the private n_lag variable and instead use the DSA specific one. This
ensures that all the code always has the same reference for the number of
LAGs.
Fixes: 32e5b5ee6b ("realtek: Add Link Aggregation (aka trunking) support")
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20707
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Commit 8ca4caacd0 ("rockchip: Add support for RK3568 LinkEase EasePi R1")
forgot to include the SoC recipe, which leads KERNEL_LOADADDR undefined.
Fixes: 8ca4caacd0 ("rockchip: Add support for RK3568 LinkEase EasePi R1")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20722
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ifname was renamed to `lan`/`wan` in commit 1f1db75432
("rockchip: make NIC name predictable for Radxa E52C/ROCK 5 ITX/ROCK 5T"),
update accordingly.
Fixes: 1f1db75432 ("rockchip: make NIC name predictable for Radxa E52C/ROCK 5 ITX/ROCK 5T")
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/20722
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Th function to set the mangement frames receive actions is only used in the
SoC specific files. They can therefore be kept local without any
declaration in headers.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20704
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The code for the RTL930x management action configuration was cleaned up
significantly for commit 75fe6b2d0b ("realtek: rtl930x: Add support for
trapping management frames"). Sync these changes to RTL931x to make it
easier to extend both implementations.
Signed-off-by: Sven Eckelmann <se@simonwunderlich.de>
Link: https://github.com/openwrt/openwrt/pull/20704
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Backport upstream patch fixing out of order DMA access for ethernet
driver. This is relevant in the context of QoS when packets doesn't
follow linear handling by QDMA HW.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
KConfig flag have an extra whitespace for CONFIG_PHY_AIROHA_USB and
value is not ignored.
Drop the extra whitespace to correctly ignore the value on kernel
compilation.
Fixes: c5b12fc02a ("airoha: Introduce support for Airoha AN7583 SoC")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Currently, feeds/base is created as an absolute symlink to $(TOPDIR)/package.
If the OpenWrt source tree is copied to another location for building (while keeping the old tree), the symlink will still point to the package directory in the old tree.
Using a relative symlink ensures that feeds/base always points to the package directory within the current OpenWrt source tree, improving portability and avoiding incorrect links.
Signed-off-by: Andy Chiang <AndyChiang_git@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/20297
Signed-off-by: Robert Marko <robimarko@gmail.com>
Make it a little bit more consistant, and a bit more idiomatic.
Signed-off-by: David Härdeman <david@hardeman.nu>
Link: https://github.com/openwrt/openwrt/pull/20673
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
The support has been removed from odhcpd, so remove the Makefile options
related to homenet.
Signed-off-by: David Härdeman <david@hardeman.nu>
Link: https://github.com/openwrt/openwrt/pull/20673
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
"system" is used to get the current time zone, "network" is used to get
the global DUID.
Signed-off-by: David Härdeman <david@hardeman.nu>
Link: https://github.com/openwrt/openwrt/pull/20673
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Support for this option has been removed from odhcpd, so remove it in
the defaults as well.
Signed-off-by: David Härdeman <david@hardeman.nu>
Link: https://github.com/openwrt/openwrt/pull/20673
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
This exands the list of AKMs to display:
- display the hash when larger than the default (loosely based on
what hostapd uses in config).
- renaming 'WPA PSK2' to 'WPA PSK-SHA256' as a result
- separate FILS suites from plain 802.1x
- add suites 3, 5, 9, 19, 20, 24, and 25
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20686
Signed-off-by: Robert Marko <robimarko@gmail.com>
Escape control characters when displaying ESSID. It is not uncommon for
a scan to encounter invalid SSIDs, containing binary data. Escape the
control characters to avoid messing the display (ENQ is particularly
bothersome).
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20686
Signed-off-by: Robert Marko <robimarko@gmail.com>
This adds the ESSID: line to the iwinfo scan results.
Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20686
Signed-off-by: Robert Marko <robimarko@gmail.com>
As per #19596 - this allows eg, modifying the bootcmd etc.
This has been useful when testing on e.g the -48, where `rtk network on` is required for the SFP ports.
Signed-off-by: Joe Holden <jwh@zorins.us>
Link: https://github.com/openwrt/openwrt/pull/19913
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The ports are physically labelled in reverse order on the device.
This patch aligns logical names with physical ones.
LED order on front of device is correct after this patch.
Fixes: 9d66b8b312
Signed-off-by: Thibaut VARÈNE <hacks@slashdirt.org>
Link: https://github.com/openwrt/openwrt/pull/20528
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Swig 4.3.0 has changed SWIG_Python_AppendOutput, which now requires an
additional parameter `is_void`. SWIG_AppendOutput remains unchanged.
This was fixed upstream in u-boot/u-boot@a63456b
```
scripts/dtc/pylibfdt/libfdt_wrap.c: In function ‘_wrap_fdt_next_node’:
scripts/dtc/pylibfdt/libfdt_wrap.c:5581:17: error: too few arguments to function ‘SWIG_Python_AppendOutput’
5581 | resultobj = SWIG_Python_AppendOutput(resultobj, val);
| ^~~~~~~~~~~~~~~~~~~~~~~~
```
This is the same fix as applied in 363e07d.
Fixes: #20619
Link: #20620
Signed-off-by: Trix Taiclet <trix@c3l.lu>
Link: https://github.com/openwrt/openwrt/pull/20620
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
After switching to 6.12, time to remove 6.6 support.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20672
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
No new reggresions was observed. Time to switch to 6.12.
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20672
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The probe order for PCIe buses and devices is non-deterministic,
making the names eth0 and eth1 unpredictable (they may be swapped).
This patch fixes the names by referencing the device path using
`ucidef_set_network_device_path`.
The mapping between silkscreen labels on the board/case and OpenWrt
interface names is as follows:
- E52C
LAN: lan
WAN: wan
- ROCK 5 ITX
RJ45 1: eth0
RJ45 2: eth1
- ROCK 5T
RJ45_1: eth0
RJ45_2: eth1
For Radxa E52C, this breaks compatibility of the network config;
therefore, set DEVICE_COMPAT_VERSION to `1.1`.
Fixes: d16d2765bd ("rockchip: add support for Radxa E52C")
Fixes: 0839345211 ("rockchip: add support for Radxa ROCK 5 ITX/ITX+")
Fixes: 4a78af9876 ("rockchip: add support for Radxa ROCK 5T")
Link: https://github.com/openwrt/openwrt/issues/20202
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Link: https://github.com/openwrt/openwrt/pull/20608
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware:
- SoC: MediaTek MT7621DAT
- Flash: 16 MiB XM25QH128C
- RAM: 128 MiB
- WLAN: 2.4 GHz (MT7603E, 11n), 5 GHz (MediaTek MT7613BEN, 11ac)
- Ethernet: 1x10/100/1000 Mbps LAN
- Buttons: 1 Reset button, 1 WPS button
- LEDs: 5x Green
- Serial Console: unpopulated header 115200 8n1 (silkscreen on PCB)
- Power: POE 802.3af (37-57V DC)
MAC addresses:
+---------+-------------------+-----------+
| | MAC | Algorithm |
+---------+-------------------+-----------+
| LAN | 80:af:ca:xx:xx:x0 | label |
| WLAN 2g | 80:af:ca:xx:xx:x0 | label |
| WLAN 5g | 82:af:ca:xx:xx:x1 | +1 |
+---------+-------------------+-----------+
Installation:
The factory firmware is locked: you can only work with Cudy signed firmware.
Download a intermediate firmware signed by Cudy here:
https://www.cudy.com/blogs/faq/openwrt-software-download
After that, login to the router (192.168.10.254, password "admin") and install the intermediate firmware.
If you can reach LuCI or SSH now on the intermediate firmware, just use the sysupgrade image with the 'Keep settings' option turned off.
Special thanks to Daniel de Kock for starting the porting work at #16265.
Signed-off-by: Luis Mita <luis@luismita.com>
Co-Authored-By: Daniel de Kock <daniel@riot.network>
Co-Authored-By: Hauke Mehrtens <hauke@hauke-m.de>
Link: https://github.com/openwrt/openwrt/pull/20268
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Allow to configure SerDes polarity in device tree. To achieve this, add
new device tree properties that can be set in the device tree definition
of the SerDes, are read by the PCS driver during probe and are applied
upon SerDes setup.
This may be required for supporting new devices as the SerDes polarity
is usually subject to the vendors board design and defined in the
hardware profile (HWP) in the SDK. Most importantly, it is quite an
important step towards being able to setup everything on our own instead
of relying on the bootloader.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20648
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The configuration code for RTL930X already provides setting the SerDes
TX and RX PN polarity. This is covered by a function called
'..._sds_mac_link_config'. But despite its name, this function only sets
the SerDes polarity and nothing more.
Moreover, this was called always with 'not inverted' in the SerDes setup
code and thus not really allowing to be configured.
At first, streamline the SerDes polarity configuration code. Rename the
function to reflect what it actually does instead of giving the
impression of doing more. Improve the implementation of this for better
readability.
As the implementation, page, register, bits, etc. are exactly the same
for both RTL930X and RTL931X (compare [1] and [2]), move and name it
accordingly so we can also add support for RTL931X.
[1] 69d2890a2e/sources/rtk-xgs1210/src/hal/phy/phy_rtl9300.c (L1384)
[2] 69d2890a2e/sources/rtk-xgs1210/src/hal/phy/phy_rtl9310.c (L3479)
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/20648
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
