Alban Bedel 766afc3dff arm: tegra: Fix the CPU complex reset masks ... The CPU complex reset masks are not matching with the datasheet for the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20 and T30 the register consist of groups of 4 bits, with one bit for each CPU core. On T20 the 2 high bits of each group are always stubbed as there is only 2 cores. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swrren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>		2013-12-18 10:19:49 -07:00
..
cpu	ARM: tegra: support SKU b1 of Tegra30	2013-12-18 10:19:48 -07:00
dts	exynos5: dts: Add device node for XHCI	2013-10-20 23:42:38 +02:00
imx-common	ARM: imx-common: convert makefiles to Kbuild style	2013-10-31 13:20:39 -04:00
include/asm	arm: tegra: Fix the CPU complex reset masks	2013-12-18 10:19:49 -07:00
lib	Revert "ARM: move interrupt_init to before relocation"	2013-12-11 21:28:06 +01:00
config.mk	arm: keep all sections in ELF file	2013-12-07 06:53:58 +01:00