Masahiro Yamada fcc238baee ARM: uniphier: collect clock/PLL init code into a single directory ... Now PLLs for DRAM controller are initialized in SPL, and the others in U-Boot proper. Setting up all of them in a single directory will be helpful when we want to share code between SPL and U-Boot proper. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>		2016-09-19 00:06:47 +09:00
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arc	arc: Rename AXS101 board to more generic AXS10x	2016-08-05 12:50:33 +03:00
arm	ARM: uniphier: collect clock/PLL init code into a single directory	2016-09-19 00:06:47 +09:00
avr32
blackfin
m68k	net: mii: Changes not made by spatch	2016-08-15 15:29:03 -05:00
microblaze
mips	net: mii: Use spatch to update miiphy_register	2016-08-15 15:26:33 -05:00
nds32	arm, nds32, sh: remove useless ioremap()/iounmap() defines	2016-07-14 18:22:25 -04:00
nios2
openrisc
powerpc	net: mii: Changes not made by spatch	2016-08-15 15:29:03 -05:00
sandbox	cmd: Split 'bootz' and 'booti' out from 'bootm'	2016-08-20 11:35:07 -04:00
sh	arm, nds32, sh: remove useless ioremap()/iounmap() defines	2016-07-14 18:22:25 -04:00
sparc
x86	x86: efi: Fix EFI 64-bit payload build warnings	2016-08-30 09:26:05 +08:00
xtensa	xtensa: add support for the 'xtfpga' evaluation board	2016-08-15 18:46:40 -04:00
.gitignore
Kconfig	xtensa: add support for the xtensa processor architecture [2/2]	2016-08-15 18:46:38 -04:00