Stephen George f110fe940c powerpc/85xx: Adding configuration for DCSRCR to enable 32M access ... Configuring DCSRCR to define the DCSR space to be 1G instead of the default 4M. DCSRCR only allows selection of either 4M or 1G. Most DCSR registers are within 4M but the Nexus trace buffer is located at offset 16M within the DCSR. Configuring the LAW to be 32M to allow access to the Nexus trace buffer. No TLB modification is required since accessing the Nexus trace buffer from within u-boot is not required. Signed-off-by: Stephen George <stephen.george@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-07-29 08:53:37 -05:00
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arm	cleanup: Fix typos and misspellings in various files.	2011-07-28 21:27:36 +02:00
avr32	unify version_string	2011-07-28 17:22:53 +02:00
blackfin	unify version_string	2011-07-28 17:22:53 +02:00
m68k	cleanup: Fix typos and misspellings in various files.	2011-07-28 21:27:36 +02:00
microblaze	unify version_string	2011-07-28 17:22:53 +02:00
mips	unify version_string	2011-07-28 17:22:53 +02:00
nios2	unify version_string	2011-07-28 17:22:53 +02:00
powerpc	powerpc/85xx: Adding configuration for DCSRCR to enable 32M access	2011-07-29 08:53:37 -05:00
sh	unify version_string	2011-07-28 17:22:53 +02:00
sparc	cleanup: Fix typos and misspellings in various files.	2011-07-28 21:27:36 +02:00
x86	cleanup: Fix typos and misspellings in various files.	2011-07-28 21:27:36 +02:00
.gitignore	update include/asm/ gitignore after move	2010-05-07 00:17:30 +02:00