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u-boot-2016/arch/mips/include
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Matthias Schiffer 499b847521 MIPS: fix mips_cache fallback without __builtin_mips_cache 
The "R" constraint supplies the address of an variable in a register. Use
"r" instead and adjust asm to supply the content of addr in a register
instead.

Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations")
Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-03-09 11:00:40 +01:00
..
asm MIPS: fix mips_cache fallback without __builtin_mips_cache 2016-03-09 11:00:40 +01:00