mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
5753e00585
This change will read the 0:ART partition for calibration data and apply it to the appropriate registers. Following sequence added for the same. 1. created scm_read call to read the protected register. 2. added function to read data from ART partition of all flash types 3. added function to apply data to the Caldata register. Change-Id: I4c769be3cdf664e4c59159851cc211fca53c0f27 Signed-off-by: Ignatius Michael (Jihan) Jihan <quic_mignatiu@quicinc.com>
222 lines
6.3 KiB
C
222 lines
6.3 KiB
C
/* Copyright (c) 2015-2017 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MACH_SCM_H
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#define __MACH_SCM_H
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#define SCM_SVC_BOOT 0x1
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#define SCM_SVC_PIL 0x2
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#define SCM_SVC_UTIL 0x3
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#define SCM_SVC_TZ 0x4
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#define SCM_SVC_IO 0x5
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#define SCM_SVC_INFO 0x6
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#define SCM_SVC_SSD 0x7
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#define SCM_SVC_FUSE 0x8
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#define SCM_SVC_PWR 0x9
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#define SCM_SVC_CRYPTO 0xA
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#define SCM_SVC_CP 0xC
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#define SCM_SVC_DCVS 0xD
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#define SCM_SVC_TZSCHEDULER 0xFC
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#define SCM_SVC_WR 0x10
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#define SCM_SVC_RD 0x12
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#define QFPROM_IS_AUTHENTICATE_CMD 0x7
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#define TZBSP_BUILD_VER_QUERY_CMD 0x4
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#define SCM_BOOT_ADDR 0x1
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#define SCM_FLAG_COLDBOOT_CPU1 0x1
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#define SCM_SVC_ID_SHIFT 0xA
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#define IS_CALL_AVAIL_CMD 0x1
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#define PART_INFO_CMD 0x22
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#ifdef CONFIG_IPQ_BT_SUPPORT
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#define SCM_PAS_INIT_IMAGE_CMD 0x1
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#define SCM_PAS_AUTH_AND_RESET_CMD 0x5
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#define SCM_CMD_OTP 0x15
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#endif
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/* scm_v8 */
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#define SCM_VAL 0x0
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#define SCM_IO_READ 0x1
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#define SCM_IO_WRITE 0x2
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#define CE_CHN_SWITCH_CMD 0x2
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#define SCM_EBUSY -6
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#define SCM_ENOMEM -5
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#define SCM_EOPNOTSUPP -4
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#define SCM_EINVAL_ADDR -3
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#define SCM_EINVAL_ARG -2
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#define SCM_ERROR -1
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#define SCM_INTERRUPTED 1
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/* OWNER IDs */
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#define SCM_OWNR_SIP 2
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#define SCM_OWNR_QSEE_OS 50
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#define SCM_OWNR_TEE_HLOS 51
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/* SVC IDs */
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#define SCM_SVC_APP_MGR 1 /* Application service manager */
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#define SCM_SVC_LISTENER 2 /* Listener service manager */
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#define SCM_SVC_EXTERNAL 3 /* External Image loading */
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#define SCM_SVC_MON_SAT 252 /* Monitor SAT test calls */
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#define SCM_SVC_TEST_1 253 /* TZ test calls (continued). */
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#define SCM_SVC_TEST_0 254 /* TZ test calls */
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/* to align the pointer to the (next) page boundary */
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#define PAGE_ALIGN(addr) ALIGN(addr, PAGE_SIZE)
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/**
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* struct scm_command - one SCM command buffer
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* @len: total available memory for command and response
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* @buf_offset: start of command buffer
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* @resp_hdr_offset: start of response buffer
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* @id: command to be executed
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* @buf: buffer returned from scm_get_command_buffer()
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*
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* An SCM command is laid out in memory as follows:
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*
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* ------------------- <--- struct scm_command
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* | command header |
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* ------------------- <--- scm_get_command_buffer()
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* | command buffer |
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* ------------------- <--- struct scm_response and
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* | response header | scm_command_to_response()
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* ------------------- <--- scm_get_response_buffer()
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* | response buffer |
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* -------------------
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*
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* There can be arbitrary padding between the headers and buffers so
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* you should always use the appropriate scm_get_*_buffer() routines
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* to access the buffers in a safe manner.
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*/
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struct scm_command {
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u32 len;
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u32 buf_offset;
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u32 resp_hdr_offset;
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u32 id;
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u32 buf[0];
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};
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/**
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* struct scm_response - one SCM response buffer
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* @len: total available memory for response
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* @buf_offset: start of response data relative to start of scm_response
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* @is_complete: indicates if the command has finished processing
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*/
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struct scm_response {
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u32 len;
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u32 buf_offset;
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u32 is_complete;
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};
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int scm_init(void);
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extern int scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, size_t cmd_len,
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void *resp_buf, size_t resp_len);
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extern int qca_scm_call(u32 svc_id, u32 cmd_id, void *buf, size_t len);
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int qca_scm_usb_mode_write(u32, u32);
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int qca_scm_call_write(u32, u32, u32 *, u32);
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int qca_scm_call_read(u32, u32, u32 *, u32*);
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int qca_scm_crypto(int, void *, u32);
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int qca_scm_sdi(void);
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int qca_scm_dload(u32);
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int qca_scm_fuseipq(u32, u32, void *, size_t);
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bool is_scm_armv8(void);
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int qca_scm_secure_authenticate(void *cmd_buf, size_t cmd_len);
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int qca_scm_part_info(void *cmd_buf, size_t cmd_len);
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s32 qca_scm_call_atomic_ver2_32(u32 svc, u32 cmd, u32 arg1, u32 arg2);
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int qca_scm_auth_kernel(void *cmd_buf, size_t cmd_len);
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int is_scm_sec_auth_available(u32 svc_id, u32 cmd_id);
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#ifdef CONFIG_IPQ_TZT
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int qca_scm(u32 svc_id, u32 cmd_id, u32 ownr_id, u32 *addr, u32 len);
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#endif
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#ifdef CONFIG_IPQ_BT_SUPPORT
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int qti_scm_otp(u32 peripheral);
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int qti_scm_pas_init_image(u32 peripheral, u32 addr);
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int qti_pas_and_auth_reset(u32 peripheral);
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#endif
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#define MAX_QCA_SCM_RETS 3
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#define MAX_QCA_SCM_ARGS 10
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#define SCM_READ_OP 1
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/**
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* struct qca_scm_desc
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* <at> arginfo: Metadata describi`ng the arguments in args[]
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* <at> args: The array of arguments for the secure syscall
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* <at> ret: The values returned by the secure syscall
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* <at> extra_arg_buf: The buffer containing extra arguments
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(that don't fit in available registers)
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* <at> x5: The 4rd argument to the secure syscall or physical address of
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extra_arg_buf
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*/
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struct qca_scm_desc {
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u32 arginfo;
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u32 args[MAX_QCA_SCM_ARGS];
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u32 ret[MAX_QCA_SCM_RETS];
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/* private */
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void *extra_arg_buf;
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u64 x5;
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};
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#define QCA_SCM_ARGS_IMPL(num, a, b, c, d, e, f, g, h, i, j, ...) (\
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(((a) & 0xff) << 4) | \
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(((b) & 0xff) << 6) | \
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(((c) & 0xff) << 8) | \
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(((d) & 0xff) << 10) | \
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(((e) & 0xff) << 12) | \
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(((f) & 0xff) << 14) | \
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(((g) & 0xff) << 16) | \
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(((h) & 0xff) << 18) | \
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(((i) & 0xff) << 20) | \
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(((j) & 0xff) << 22) | \
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(num & 0xffff))
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#define QCA_SCM_ARGS(...) QCA_SCM_ARGS_IMPL(__VA_ARGS__, \
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0)
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#define QCA_SCM_SIP_FNID(s, c) (((((s) & 0xFF) << 8) | \
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((c) & 0xFF)) | 0x02000000)
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#define QCA_SCM_FNID(s, c, o) (((((s) & 0xFF) << 8) | \
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((c) & 0xFF)) | (((o) & 0xFF) << 24))
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#define QCA_SMC_ATOMIC_MASK 0x80000000
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#define QCA_MAX_ARG_LEN 5
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typedef struct {
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u64 reg_x0;
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u64 reg_x1;
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u64 reg_x2;
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u64 reg_x3;
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u64 reg_x4;
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u64 reg_x5;
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u64 reg_x6;
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u64 reg_x7;
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u64 reg_x8;
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u64 kernel_start;
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} kernel_params;
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#define SCM_ARCH64_SWITCH_ID 0x1
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#define QCA_IS_CALL_AVAIL_CMD 0x1
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#define SCM_EL1SWITCH_CMD_ID 0xf
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#define SCM_NULL_OP 0
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#define SCM_RW_OP 2
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#define SCM_BUF_VAL 3
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void __attribute__ ((noreturn)) jump_kernel64(void *kernel_entry,
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void *fdt_addr);
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void __attribute__ ((noreturn)) execute_tzt(void *entry_addr);
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#endif
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