Haiying Wang dbbbb3abef Make DDR interleaving mode work correctly ... Fix some bugs: 1. Correctly set intlv_ctl in cs_config. 2. Correctly set sa, ea in cs_bnds when bank interleaving mode is enabled. 3. Set base_address and total memory for each ddr controller in memory controller interleaving mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>		2008-10-18 21:54:04 +02:00
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ddr	Make DDR interleaving mode work correctly	2008-10-18 21:54:04 +02:00