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https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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With release of ARC HS38 v2.1 new IO coherency engine could be built-in ARC core. This hardware module ensures coherency between DMA-ed data from peripherals and L2 cache. With L2 and IOC enabled there's no overhead for L2 cache manual maintenance which results in significantly improved IO bandwidth. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> |
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| .. | ||
| _millicodethunk.S | ||
| bootm.c | ||
| cache.c | ||
| cpu.c | ||
| init_helpers.c | ||
| interrupts.c | ||
| ints_low.S | ||
| libgcc2.c | ||
| libgcc2.h | ||
| Makefile | ||
| memcmp.S | ||
| memcpy-700.S | ||
| memset.S | ||
| relocate.c | ||
| reset.c | ||
| sections.c | ||
| start.S | ||
| strchr-700.S | ||
| strcmp.S | ||
| strcpy-700.S | ||
| strlen.S | ||
| timer.c | ||