mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2025-12-10 07:44:53 +01:00
cc3573b68a
Adding support for DK04-C2,C3,C4,C5 and DK07-C1,C2,C3 boards. Change-Id: I2727645086328331deffd63849bedbf119d163c8 Signed-off-by: Sasirekaa Madhesu <smadhesu@codeaurora.org>
208 lines
4.3 KiB
Text
208 lines
4.3 KiB
Text
/*
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* Copyright (c) 2016, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "ipq40xx-soc.dtsi"
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#include <dt-bindings/qcom/gpio-ipq40xx.h>
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/ {
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nand@79B0000 {
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status = "ok";
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nand_gpio {
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gpio1 {
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gpio = <52>;
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func = <1>;
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pull = <GPIO_PULL_UP>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio2 {
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gpio = <53>;
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func = <1>;
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pull = <GPIO_PULL_UP>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio3 {
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gpio = <54>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio4 {
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gpio = <55>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio5 {
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gpio = <56>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio6 {
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gpio = <57>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio7 {
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gpio = <58>;
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func = <1>;
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pull = <GPIO_PULL_UP>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio8 {
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gpio = <59>;
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func = <1>;
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pull = <GPIO_PULL_UP>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio9 {
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gpio = <60>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio10 {
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gpio = <62>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio11 {
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gpio = <63>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio12 {
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gpio = <64>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio13 {
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gpio = <65>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio14 {
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gpio = <66>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio15 {
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gpio = <67>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio16 {
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gpio = <68>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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gpio17 {
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gpio = <69>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_2MA>;
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oe = <GPIO_OE_DISABLE>;
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vm = <GPIO_VM_ENABLE>;
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od_en = <GPIO_OD_DISABLE>;
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pu_res = <GPIO_PULL_RES2>;
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};
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};
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};
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};
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