Simon Glass cd3c67692b tegra: clock: Adjust PLL access to avoid a warning ... A harmless but confusing warning is displayed when looking up the DisplayPort PLL. Correct this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>		2015-06-09 09:56:14 -07:00
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arc	arc: gitignore: ignore ARC DTBs	2015-05-18 12:06:36 +03:00
arm	tegra: clock: Adjust PLL access to avoid a warning	2015-06-09 09:56:14 -07:00
avr32
blackfin
m68k
microblaze
mips
nds32
nios2
openrisc
powerpc	powerpc: gitignore: ignore PowerPC DTBs	2015-05-28 08:18:20 -04:00
sandbox	sandbox: Compile test device tree when CONFIG_UT_DM is defined	2015-06-04 03:34:48 -06:00
sh
sparc
x86	x86: gpio: add pinctrl support from the device tree	2015-06-04 03:32:08 -06:00
.gitignore
Kconfig