mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
synced 2026-03-07 17:57:38 +01:00
1b9a7dbe6e
removing the redundant initialization to reduce the size of uboot Change-Id: I4a129bfc1bad4e402a66a1b1051d1f432a581a6e Signed-off-by: Timple Raj M <quic_timple@quicinc.com>
153 lines
2.8 KiB
Text
153 lines
2.8 KiB
Text
/*
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* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
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*
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "devsoc-soc.dtsi"
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/ {
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model ="QCA, DEVSOC-EMULATION";
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compatible = "qca,devsoc", "qca,devsoc-emulation";
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machid = <0xF060000>;
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config_name = "config@emulation-fbc";
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aliases {
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console = "/serial@78AF000";
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nand = "/nand-controller@79B0000";
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mmc = "/sdhci@7804000";
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usb0 = "/xhci@8a00000";
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i2c0 = "/i2c@78B6000";
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};
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console: serial@78AF000 {
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status = "ok";
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serial_gpio {
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blsp0_uart_rx {
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gpio = <18>;
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func = <1>;
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pull = <GPIO_PULL_DOWN>;
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drvstr = <GPIO_8MA>;
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};
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blsp0_uart_tx {
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gpio = <19>;
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func = <1>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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timer {
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gpt_freq_hz = <240000>;
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};
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nand: nand-controller@79B0000 {
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status = "okay";
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nand_gpio {
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qspi_dat3 {
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gpio = <8>;
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func = <2>;
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drvstr = <GPIO_8MA>;
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};
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qspi_dat2 {
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gpio = <9>;
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func = <2>;
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drvstr = <GPIO_8MA>;
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};
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qspi_dat1 {
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gpio = <10>;
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func = <2>;
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drvstr = <GPIO_8MA>;
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};
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qspi_dat0 {
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gpio = <11>;
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func = <2>;
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drvstr = <GPIO_8MA>;
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};
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qspi_cs_n {
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gpio = <12>;
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func = <2>;
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drvstr = <GPIO_8MA>;
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};
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qspi_clk {
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gpio = <13>;
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func = <2>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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pci0: pci@20000000 {
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status = "ok";
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perst_gpio = <42>;
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lane = <1>;
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pci_gpio {
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pci_rst {
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gpio = <42>;
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pull = <GPIO_PULL_UP>;
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oe = <GPIO_OE_ENABLE>;
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drvstr = <GPIO_8MA>;
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};
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pci_clk {
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gpio = <37>;
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oe = <GPIO_OE_ENABLE>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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pci1: pci@18000000 {
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status = "ok";
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perst_gpio = <41>;
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lane = <2>;
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pci_gpio {
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pci_rst {
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gpio = <41>;
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pull = <GPIO_PULL_UP>;
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oe = <GPIO_OE_ENABLE>;
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drvstr = <GPIO_8MA>;
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};
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pci_clk {
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gpio = <46>;
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oe = <GPIO_OE_ENABLE>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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pci2: pci@10000000 {
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status = "ok";
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perst_gpio = <40>;
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lane = <1>;
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pci_gpio {
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pci_rst {
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gpio = <40>;
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pull = <GPIO_PULL_DOWN>;
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oe = <GPIO_OE_ENABLE>;
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};
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pci_clk {
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gpio = <43>;
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oe = <GPIO_OE_ENABLE>;
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drvstr = <GPIO_8MA>;
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};
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};
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};
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xhci@8a00000 {
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qcom,emulation = <1>;
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};
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ess-switch {
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switch_mac_mode0 = <PORT_WRAPPER_USXGMII>;
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switch_mac_mode1 = <PORT_WRAPPER_USXGMII>;
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};
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};
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