Matt Porter a3c3fabb0f arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx ... In warm reset conditions on OMAP36xx/AM/DM37xx the rom code incorrectly sets the DPLL4 clock input divider to /6.5 which is an invalid value unless the input clock is 13MHz. When a JTAG emulator is attached, a warm reset is necessary after the emulator gains control of the process. This results in a loss of serial output due to the invalid DPLL4 settings. This patch fixes the issue by resetting the DPLL4 clock input divider to /1 when the input clock is not 13MHz. AM/DM37x TRM section 3.5.3.3.3.2.1 specifies that the /6.5 setting is only used when the input clock is 13MHz. Signed-off-by: Matt Porter <mporter@ti.com>		2012-05-15 08:31:41 +02:00
..
board.c	omap3: Introduce weak misc_init_r	2012-05-15 08:31:28 +02:00
clock.c	arm, omap3: fix warm reset serial output on OMAP36xx/AM/DM37xx	2012-05-15 08:31:41 +02:00
config.mk	omap3: new SPL structure support	2011-09-30 22:00:54 +02:00
emac.c	AM35xx: add EMAC support	2011-12-06 23:59:36 +01:00
emif4.c	omap3: emif|sdrc: use a single global data define	2010-12-11 11:41:42 -05:00
lowlevel_init.S	armv7: add appropriate headers for assembly functions	2012-05-15 08:31:26 +02:00
Makefile	OMAP3 SPL: Add identify_nand_chip function	2011-12-06 23:59:38 +01:00
mem.c	OMAP3: Change mem_ok to clear again after reading back	2011-12-06 23:59:38 +01:00
sdrc.c	sdrc.c: Fix typo in do_sdrc_init() for SPL	2012-03-29 08:19:29 +02:00
spl_id_nand.c	OMAP3 SPL: Add identify_nand_chip function	2011-12-06 23:59:38 +01:00
sys_info.c	omap3: make get_board_rev() function weak	2012-01-16 08:40:11 +01:00