mirror of
https://git.codelinaro.org/clo/qsdk/oss/boot/u-boot-2016.git
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005e4c761d
Change-Id: I62e5acb28c6369149119cc0d7a1f0aff619f698a Signed-off-by: Akila N <akilan@codeaurora.org>
129 lines
4.1 KiB
C
129 lines
4.1 KiB
C
/*
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* Copyright (c) 2015 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define I2C_STATUS_ERROR_MASK 0x38000FC
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/* QUP Core register offsets */
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#define QUP_CONFIG_OFFSET 0x0
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#define QUP_STATE_OFFSET 0x4
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#define QUP_IO_MODES_OFFSET 0x8
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#define QUP_SW_RESET_OFFSET 0xc
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#define QUP_TIME_OUT_OFFSET 0x10
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#define QUP_TIME_OUT_CURRENT_OFFSET 0x14
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#define QUP_OPERATIONAL_OFFSET 0x18
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#define QUP_ERROR_FLAGS_OFFSET 0x1c
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#define QUP_ERROR_FLAGS_EN_OFFSET 0x20
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#define QUP_TEST_CTRL_OFFSET 0x24
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#define QUP_OPERATIONAL_MASK_OFFSET 0x28
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#define QUP_MX_OUTPUT_COUNT_OFFSET 0x100
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#define QUP_MX_OUTPUT_CNT_CURRENT_OFFSET 0x104
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#define QUP_OUTPUT_DEBUG_OFFSET 0x108
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#define QUP_OUTPUT_FIFO_WORD_CNT_OFFSET 0x10c
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#define QUP_OUTPUT_FIFO_OFFSET 0x110
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#define QUP_MX_WRITE_COUNT_OFFSET 0x150
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#define QUP_WRITE_CNT_CURRENT_OFFSET 0x154
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#define QUP_MX_INPUT_COUNT_OFFSET 0x200
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#define QUP_MX_READ_COUNT_OFFSET 0x208
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#define QUP_MX_READ_CNT_CURRENT_OFFSET 0x20c
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#define QUP_INPUT_DEBUG_OFFSET 0x210
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#define QUP_INPUT_FIFO_WORD_CNT_OFFSET 0x214
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#define QUP_INPUT_FIFO_OFFSET 0x218
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#define QUP_I2C_MASTER_CLK_CTL_OFFSET 0x400
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#define QUP_I2C_MASTER_STATUS_OFFSET 0x404
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#define QUP_I2C_MASTER_CONFIG_OFFSET 0x408
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#define QUP_MAX_OFFSET 0xfff
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#define QUP_MX_OUTPUT_COUNT 0x0000
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#define QUP_MX_INPUT_COUNT 0x0000
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#define QUP_MX_WRITE_COUNT 0x0000
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#define QUP_MX_READ_COUNT 0x0000
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#define SUCCESS 0
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#define ENACK 1
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#define TIMEOUT_CNT 100
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#define QUP_STATE_RESET 0x0
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#define QUP_STATE_RUN 0x1D
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#define QUP_STATE_PAUSE 0x1F
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#define QUP_STATE_VALID_BIT 2
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#define QUP_STATE_VALID 1
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#define QUP_STATE_MASK 0x3
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#define NACK_BIT_MASK 0x8
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#define NACK_BIT_SHIFT 3
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#define QUP_CONFIG_MINI_CORE_I2C (2 << 8)
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#define I2C_BIT_WORD_V1 0xF
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#define I2C_BIT_WORD_V2 0x7
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#define INPUT_FIFO_MODE (0x0 << 12)
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#define OUTPUT_FIFO_MODE (0x0 << 10)
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#define INPUT_BLOCK_MODE (0x01 << 12)
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#define OUTPUT_BLOCK_MODE (0x01 << 10)
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#define PACK_EN (0x01 << 15)
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#define UNPACK_EN (0x01 << 14)
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#define OUTPUT_BIT_SHIFT_EN (0x01 << 16)
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#define ERROR_FLAGS_EN 0x7C
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#define I2C_MASTER_STATUS_CLEAR 0xFFFFFC
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#define QUP_DATA_AVAILABLE_FOR_READ (1 << 5)
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#define OUTPUT_SERVICE_FLAG (1 << 8)
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#define INPUT_SERVICE_FLAG (1 << 9)
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#define MAX_OUTPUT_DONE_FLAG (1 << 10)
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#define MAX_INPUT_DONE_FLAG (1 << 11)
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#define OUTPUT_FIFO_NOT_EMPTY (1 << 4)
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#define OUTPUT_FIFO_FULL (1 << 6)
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#define INPUT_FIFO_NOT_EMPTY (1 << 5)
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#define INPUT_FIFO_FULL (1 << 7)
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#define QUP_APP_CLK_ON_EN (1 << 12)
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#define QUP_CORE_CLK_ON_EN (1 << 13)
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#define QUP_FIFO_CLK_GATE_EN (1 << 14)
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#define QUP_EN_VERSION_TWO_TAG 1
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#define I2C_WRITE 0x0
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#define I2C_READ 0x1
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#define QUP_I2C_DATA_SEQ (0x2 << 8)
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#define QUP_I2C_RECV_SEQ (0x4 << 8)
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#define QUP_I2C_SLAVE_READ (0x1)
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#define QUP_I2C_START_SEQ_V1 (0x1 << 8)
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#define QUP_I2C_START_SEQ_V2 0x81
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#define QUP_I2C_DATA_WRITE_SEQ 0x82
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#define QUP_I2C_DATA_WRITE_AND_STOP_SEQ 0x83
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#define QUP_I2C_DATA_READ_SEQ 0x85
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#define QUP_I2C_DATA_READ_AND_STOP_SEQ 0x87
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#define QUP_I2C_STOP_SEQ 0x88
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#define QUP_I2C_START_AND_STOP_SEQ 0x8A
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#define QUP_I2C_NOP_PADDING 0x97
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#define OUT_FIFO_WR_TAG_BYTE_CNT 4
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#define OUT_FIFO_RD_TAG_BYTE_CNT 8
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#define IN_FIFO_TAG_BYTE_CNT 2
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#define OFFSET_BYTE_CNT 2
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#define QUP_I2C_ADDR(x) ((x & 0xFF) << 1)
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#define QUP_I2C_DATA(x) (x & 0xFF)
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enum dir {
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READ,
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WRITE,
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};
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/* I2C some pre-defined frequencies */
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#define I2C_CLK_1KHZ 1
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#define I2C_CLK_100KHZ 100
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#define I2C_CLK_400KHZ 400
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#define I2C_CLK_1MHZ 1000
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#define QUP_INPUT_CLK_TCXO 19200
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#define QUP_INPUT_CLK QUP_INPUT_CLK_TCXO
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#define I2C_INPUT_CLK_TCXO_DIV4 ((I2C_INPUT_CLK_TCXO)/4)
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#define qup_v1 0
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#define qup_v2 1
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